Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/1999
04/22/1999DE19825033A1 Semiconductor substrates are treated with an ozone- or active oxygen-containing medium
04/22/1999DE19822724A1 Pattern fault checking system for IC circuits, plasma image screens, or LCD plates
04/22/1999DE19813199A1 Plasma generator with microwave waveguide
04/22/1999DE19802523A1 Process for producing a hemispherical grain silicon
04/22/1999DE19756486C1 Carrier table for a photo mask in a microchip manufacturing arrangement
04/22/1999DE19745856A1 IC component
04/22/1999DE19744643A1 Semiconductor component adhesive-pressing method
04/22/1999DE19744618A1 Gravimetric method for determining material removal from semiconductor wafers
04/22/1999DE19743289A1 High density multilevel interconnect substrate, especially for multi-chip modules, has insulation levels of different materials
04/22/1999DE19742624A1 Vertical bipolar transistor
04/22/1999CA2376059A1 Method and apparatus to produce large inductive plasma for plasma processing
04/22/1999CA2306384A1 Method of forming an electronic device
04/22/1999CA2305456A1 Copper metallization of silicon wafers using insoluble anodes
04/22/1999CA2305230A1 Memory device having a crested tunnel barrier
04/21/1999EP0910126A2 MOS field effect transistor with an improved lightly doped diffusion region structure and method of forming the same
04/21/1999EP0910125A1 Method and device for sealing ic chip
04/21/1999EP0910124A2 Semiconductor with lateral insulator
04/21/1999EP0910123A1 Process control system
04/21/1999EP0910122A1 Tool chip, bonding tool with the tool chip, and method for controlling the bonding tool
04/21/1999EP0910121A1 Semiconductor device
04/21/1999EP0910120A2 Method of producing a ferroelectric thin film containing bismuth
04/21/1999EP0910119A2 Method for oxidizing a structure during the fabrication of a semiconductor device
04/21/1999EP0910118A1 Ashing method
04/21/1999EP0910117A2 Methods for protecting device components from chemical mechanical polish induced defects
04/21/1999EP0910116A2 Cleaning a potassium contaminated surface with pure hot water
04/21/1999EP0910115A1 Heat-treating method and radiant heating device
04/21/1999EP0910114A2 Wafer shipper and package
04/21/1999EP0910113A1 Carrier for substrate of ball-grid array integrated circuit devices
04/21/1999EP0909989A1 Photolithographic processing method and apparatus
04/21/1999EP0909988A1 Photolithographic processing method
04/21/1999EP0909987A1 Photolithographic processing method and apparatus
04/21/1999EP0909986A1 Photolithographic processing method and apparatus
04/21/1999EP0909985A1 Photolithographic processing method and apparatus
04/21/1999EP0909972A2 Method of forming a high resolution liquid crystal display device
04/21/1999EP0909837A2 Chemical vapor deposition apparatus and cleaning method thereof
04/21/1999EP0909610A2 Liquid dispensing apparatus and method
04/21/1999EP0909461A1 Method for simplifying the manufacture of an interlayer dielectric stack
04/21/1999EP0909406A1 Photomask blanks
04/21/1999EP0909341A1 Process and device for production of metallic coatings on semiconductor structures
04/21/1999EP0909311A1 Post clean treatment
04/21/1999EP0830324B1 Process for producing glass coatings for anodic bonding purposes
04/21/1999EP0784861B1 Apparatus and method for magnetron in-situ cleaning of plasma reaction chamber
04/21/1999EP0727097B1 Structure and fabrication of bipolar transistors
04/21/1999EP0637393B1 Resolution-enhancing optical phase structure for a projection illumination system
04/21/1999CN1214799A Active matrix displays and method of making
04/21/1999CN1214666A Tape cast silicon carbide dummy wafer
04/21/1999CN1214549A Improved laser fuse links and methods therefor
04/21/1999CN1214548A 多芯片模块 A multi-chip module
04/21/1999CN1214547A 多芯片模块 A multi-chip module
04/21/1999CN1214546A Probe-type test handler, IC test method using the same, and IC
04/21/1999CN1214545A Semiconductor encapsulation and its manufacture
04/21/1999CN1214544A Discrete semiconductor device and method for producing the same
04/21/1999CN1214543A Semiconductor device having simple protective structure and process of fabrication thereof
04/21/1999CN1214542A Integrated circuit fabrication method and structure
04/21/1999CN1214541A Semiconductor device and producing method thereof
04/21/1999CN1214540A Manufacture of MOS transistor with P+ polysilicon grid
04/21/1999CN1214539A Method for manufacturing semiconductor device having refractory metal silicide film
04/21/1999CN1214538A Deposition of carbon into nitride layer for improved selectivity of oxide to nitride etchrate for self aligned contact etching
04/21/1999CN1214537A Plasma etching method for forming hole in masked silicon dioxide
04/21/1999CN1214536A Apparatus and method for improved washing and drying of semiconductor wafers
04/21/1999CN1214535A Method for treating semiconductor substrates
04/21/1999CN1214534A Fabrication method of semiconductor device equipped with silicide layer
04/21/1999CN1214533A Formation of non-homogenous device layer using inert gas shield
04/21/1999CN1214531A Semiconductor device manufacturing apparatus
04/21/1999CN1214530A Tempering method of using active nitrogen to form nitride layer
04/21/1999CN1214468A Acid development-less gas-phase photoetching glue and its use process to photoetch silicon nitride
04/21/1999CN1043103C Semiconductor device and method for fabricating the same
04/21/1999CN1043102C Method for forming micro contacts of semicodnuctor device
04/20/1999US5896438 X-ray optical apparatus and device fabrication method
04/20/1999US5896317 Nonvolatile semiconductor memory device having data line dedicated to data loading
04/20/1999US5896315 Nonvolatile memory
04/20/1999US5896314 Asymmetric flash EEPROM with a pocket to focus electron injection and a manufacturing method therefor
04/20/1999US5896313 Vertical bipolar SRAM cell, array and system, and a method of making the cell and the array
04/20/1999US5896312 Programmable metallization cell structure and method of making same
04/20/1999US5896311 Semiconductor read-only memory device and method of fabricating the same
04/20/1999US5896300 Methods, apparatus and computer program products for performing post-layout verification of microelectronic circuits by filtering timing error bounds for layout critical nets
04/20/1999US5896276 Electronic assembly package including connecting member between first and second substrates
04/20/1999US5896188 Reduction of pattern noise in scanning lithographic system illuminators
04/20/1999US5896172 Method of operating a CCD imager suitable for the implementation of such a method
04/20/1999US5896038 Method of wafer level burn-in
04/20/1999US5896036 Carrier for testing semiconductor dice
04/20/1999US5896035 Electric field measuring apparatus
04/20/1999US5895976 Microelectronic assembly including polymeric reinforcement on an integrated circuit die, and method for forming same
04/20/1999US5895975 Optimized process for creating and passivating a metal pillar via structure located between two metal interconnect structures
04/20/1999US5895973 Electronic component assembly for maintaining component alignment during soldering
04/20/1999US5895971 Semiconductor device with electrical connection between semiconductor chip and substrate less breakable during shrinkage of adhesive compound
04/20/1999US5895970 Semiconductor package having semiconductor element, mounting structure of semiconductor package mounted on circuit board, and method of assembling semiconductor package
04/20/1999US5895965 Semiconductor device
04/20/1999US5895963 Semiconductor device having opening portion for fuse breakage
04/20/1999US5895961 Semiconductor device with a planarized interconnect with poly-plug and self-aligned contacts
04/20/1999US5895958 Input protection circuit for use in semiconductor device having an improved electrostatic breakdown voltage
04/20/1999US5895957 Minimum charge FET fabricated on an ultrathin silicon on sapphire wafer
04/20/1999US5895956 Semiconductor memory device
04/20/1999US5895955 MOS transistor employing a removable, dual layer etch stop to protect implant regions from sidewall spacer overetch
04/20/1999US5895954 Field effect transistor with impurity concentration peak under gate electrode
04/20/1999US5895953 Ohmic contact to lightly doped islands from a conductive rapid diffusion buried layer
04/20/1999US5895951 MOSFET structure and fabrication process implemented by forming deep and narrow doping regions through doping trenches
04/20/1999US5895950 Semiconductor device having a non-volatile memory and method of manufacturing such a semiconductor device
04/20/1999US5895948 Semiconductor device and fabrication process thereof
04/20/1999US5895947 Intergrated circuit memory devices including capacitors on capping layer