Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/1999
03/23/1999US5886389 Field-effect transistor and method for producing the same
03/23/1999US5886388 Static semiconductor memory device and manufacturing method thereof
03/23/1999US5886386 Method for making a bipolar transistor for the protection of an integrated circuit against electrostatic discharges
03/23/1999US5886385 Semiconductor device and manufacturing method thereof
03/23/1999US5886383 Integrated schottky diode and mosgated device
03/23/1999US5886382 Trench transistor structure comprising at least two vertical transistors
03/23/1999US5886380 Semiconductor memory elements having quantum box floating gates
03/23/1999US5886379 Semiconductor memory device with increased coupling ratio
03/23/1999US5886378 Single polysilicon layer flash E2 PROM cell
03/23/1999US5886377 Semiconductor device and a method for manufacturing thereof
03/23/1999US5886376 EEPROM having coplanar on-insulator FET and control gate
03/23/1999US5886373 Field effect transistor
03/23/1999US5886372 Semiconductor device having two composite field effect transistors
03/23/1999US5886371 Integrated circuit with gate-array interconnections routed over memory area
03/23/1999US5886369 Substrate is formed of n and p doped gallium phosphide and contains sulfur dopant as impurity but free of nitrogen impurity; exhibits high brightness
03/23/1999US5886368 Dielectric; reduce write and erase voltage
03/23/1999US5886367 Double-hetero structure, short wavelength, high emission power monochromaticity
03/23/1999US5886366 Thin film type monolithic semiconductor device
03/23/1999US5886364 Semiconductor device and process for fabricating the same
03/23/1999US5886363 Semiconductor device and pattern including varying transistor patterns for evaluating characteristics
03/23/1999US5886362 Method of reflowing solder bumps after probe test
03/23/1999US5886360 Semiconductor device
03/23/1999US5886357 Electron-beam writing system comprising a second aperture member including at least one rectangular beam-size adjustment aperture
03/23/1999US5886320 Laser ablation with transmission matching for promoting energy coupling to a film stack
03/23/1999US5886203 Metalorganic compounds
03/23/1999US5886102 Crosslinker and novel acrylic resin binders that effectively absorb reflected deep uv exposure radiation
03/23/1999US5885905 Semiconductor substrate and method of processing the same
03/23/1999US5885904 Method to incorporate, and a device having, oxide enhancement dopants using gas immersion laser doping (GILD) for selectively growing an oxide layer
03/23/1999US5885903 Wet etching with heated aqueous solution containing phosphoric and higher boiling sulfuric acid
03/23/1999US5885902 Initially etching pattern into antireflective coating (arc) with inert plasma gases prior to etching pattern into polysilicon layer within same chamber
03/23/1999US5885901 Rinsing solution after resist stripping process and method for manufacturing semiconductor device
03/23/1999US5885900 Filling recesses with sacrificial material having lesser etching rate and greater polishing rate than features on semiconductor substrate, then etching and chemomechanical polishing to planarize
03/23/1999US5885899 Concurrently polishing electroconductive and conformal dielectric layer and electroconductive layer coated onto semiconductor substrate; simplification
03/23/1999US5885898 Method for forming diffusion barrier layer
03/23/1999US5885897 Process for making contact to differently doped regions in a semiconductor device, and semiconductor device
03/23/1999US5885896 Using implants to lower anneal temperatures
03/23/1999US5885895 Improving electrical connection between substrate and wireline by complete removal of etched dielectric residues in contact window
03/23/1999US5885894 High density plasma chemical vapor deposition of thick undoped silicate glass layer over transistor on substrate, chemical-mechanical polishing, coating with a doped silicate glass layer
03/23/1999US5885893 Impact-free wire bonding of microelectronic devices
03/23/1999US5885892 Bumpless method of attaching inner leads to semiconductor integrated circuits
03/23/1999US5885891 Forming on semiconductor pad electrode high bonding strength first metal layer and second metal barrier layer, selectively etching second metal masked with photoresist and first metal masked with solder
03/23/1999US5885890 Method of forming contact openings and an electric component formed from the same and other methods
03/23/1999US5885889 Process of fabricating semiconductor device having doped polysilicon layer without segregation of dopant impurity
03/23/1999US5885888 Selectively etching anodized surface layer of aluminum gate electrode using solution containing phosphoric acid, acetic acid and/or nitric acid with a protective barrier forming material
03/23/1999US5885887 Method of making an igfet with selectively doped multilevel polysilicon gate
03/23/1999US5885886 Forming amorphous substrate regions by ion implantation of inactive ions while first and second impurity regions and source and drain regions are formed by ion implantation of active ions; improved current driving, short channel effects
03/23/1999US5885884 Process for fabricating a microcrystalline silicon structure
03/23/1999US5885883 Methods of forming trench-based isolation regions with reduced susceptibility to edge defects
03/23/1999US5885882 Method for making polysilicon electrode with increased surface area making same
03/23/1999US5885880 Bipolar transistor device and method for manufacturing the same
03/23/1999US5885879 Thin polysilicon masking technique for improved lithography control
03/23/1999US5885878 Lateral trench MISFET and method of manufacturing the same
03/23/1999US5885877 Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric
03/23/1999US5885876 Methods of fabricating short channel fermi-threshold field effect transistors including drain field termination region
03/23/1999US5885874 Method of making enhancement-mode and depletion-mode IGFETS using selective doping of a gate material
03/23/1999US5885873 Double coding processes for mask read only memory (ROM) devices
03/23/1999US5885872 Method for manufacturing a semiconductor device having an adjustable channel width
03/23/1999US5885871 Forming nonvolatile memory cell having increased oxide thickness at edge of tunnel oxide and under edges of polysilicon capacitor plate to improve dielectric integrity of capacitor structure
03/23/1999US5885870 Method for forming a semiconductor device having a nitrided oxide dielectric layer
03/23/1999US5885869 Method for uniformly doping hemispherical grain polycrystalline silicon
03/23/1999US5885868 Improving short channel effect of silicon-on-insulator (soi) wafer electrically-erasable programmable read only memory cells
03/23/1999US5885867 Methods of forming hemispherical grained silicon layers including anti-nucleation gases
03/23/1999US5885866 Surface treatment of polysilicon storage nodes with hot phosphoric acid to form high surface area for increased capacitance and packing density of integrated circuit devices
03/23/1999US5885863 Method of making a contact for contacting an impurity region formed in a semiconductor substrate
03/23/1999US5885862 Poly-load resistor for SRAM cell
03/23/1999US5885861 Ion implantating combinations of nitrogen and fluorine impurities into n-type regions and nitrogen and carbon into p-type regions to improve barrier
03/23/1999US5885860 Forming on a silicon carbide substrate a gate having dielectric spacer along an edge, doping substrate using gate as a mask, activating dopant at low temperature
03/23/1999US5885859 Methods of fabricating multi-gate, offset source and drain field effect transistors
03/23/1999US5885858 Method of manufacturing thin-film transistor
03/23/1999US5885857 Forming dummy via holes and/or dummy wiring pattern in interlayer dielectric layer to relieve thermal stress
03/23/1999US5885856 Integrated circuit having a dummy structure and method of making
03/23/1999US5885854 Method for application of de-wetting material for glob top applications
03/23/1999US5885853 Hollow chip package and method of manufacture
03/23/1999US5885852 Packaged semiconductor device having a flange at its side surface and its manufacturing method
03/23/1999US5885850 Method for the 3D interconnection of packages of electronic components, and device obtained by this method
03/23/1999US5885847 Method of fabricating a compound semiconductor device
03/23/1999US5885761 Semiconductor device having an elevated active region formed from a thick polysilicon layer and method of manufacture thereof
03/23/1999US5885756 Methods of patterning a semiconductor wafer having an active region and a peripheral region, and patterned wafers formed thereby
03/23/1999US5885755 Forming liquid film on surface of photoresist applied onto semiconductor substrate and pattern-exposed to light, replacing the liquid film with a developer to develop the photoresist
03/23/1999US5885754 Method of forming a pattern
03/23/1999US5885751 Method and apparatus for depositing deep UV photoresist films
03/23/1999US5885750 Tantalum adhesion layer and reactive-ion-etch process for providing a thin film metallization area
03/23/1999US5885749 Method of customizing integrated circuits by selective secondary deposition of layer interconnect material
03/23/1999US5885748 Method of exposing, with correction of pattern data used to draw photomask to overcome proximity effects
03/23/1999US5885747 Providing charged beam pattern drawing method which can draw auxiliary pattern for compensating for optical proximity effect by use of charged beam pattern drawing apparatus provided with acceleration voltage and beam resolution
03/23/1999US5885745 Photolithographic dielectric film
03/23/1999US5885744 Photoresist composition
03/23/1999US5885661 Droplet jet method for coating flat substrates with resist or similar materials
03/23/1999US5885648 Process for making stoichiometric mixed metal oxide films
03/23/1999US5885507 Method for encasing articles
03/23/1999US5885505 Method for producing electronic part sealed body
03/23/1999US5885477 Fluorocarbon surfactant, about 4.0 percent by weight sodium chloride salt, and about 19.0 percent by weight of a buffered oxide etch comprising ammonium fluoride, hydrofluoric acid, and water
03/23/1999US5885472 Method for detecting etching endpoint, and etching apparatus and etching system using the method thereof
03/23/1999US5885469 Topographical structure of an electrostatic chuck and method of fabricating same
03/23/1999US5885468 Micromechanical component and production method
03/23/1999US5885428 Method and apparatus for both mechanically and electrostatically clamping a wafer to a pedestal within a semiconductor wafer processing system
03/23/1999US5885425 Angled sputtering using a collimation grid having angled vanes which limit the distribution of trajectories of particles in at least one coordinate direction around a central axis oriented at an angle of less than 90 degrees to said surface
03/23/1999US5885423 Cammed nut for ceramics fastening
03/23/1999US5885404 Pedestal with self retaining sealing ring for semiconductor device etching system
03/23/1999US5885403 System for cleaning and etching
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