Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/1999
10/12/1999US5966605 Method of forming a transistor
10/12/1999US5966604 Method of manufacturing MOS components having lightly doped drain structures
10/12/1999US5966603 NROM fabrication method with a periphery portion
10/12/1999US5966602 Nonvolatile semiconductor memory and fabricating method thereof
10/12/1999US5966601 Method of making non-volatile semiconductor memory arrays
10/12/1999US5966600 DRAM process with a multilayer stack structure
10/12/1999US5966599 Method for fabricating a low trigger voltage silicon controlled rectifier and thick field device
10/12/1999US5966598 Semiconductor device having an improved trench isolation and method for forming the same
10/12/1999US5966597 Method of forming a semiconductor device
10/12/1999US5966596 Method of fabricating semiconductor devices by crystallizing amorphous silicon with nickel
10/12/1999US5966595 Method to form a DRAM capacitor using low temperature reoxidation
10/12/1999US5966594 Semiconductor device and method for manufacturing the same
10/12/1999US5966593 Method of forming a wafer level contact sheet having a permanent z-axis material
10/12/1999US5966592 Structure and method for making a compliant lead for a microelectronic device
10/12/1999US5966591 Method and tool for handling micro-mechanical structures
10/12/1999US5966589 Method of fabricating thin film transistor array
10/12/1999US5966580 Process for making a thin film using a metal paste
10/12/1999US5966523 Method of estimating power consumption of semiconductor integrated circuit
10/12/1999US5966521 For integrated circuits
10/12/1999US5966518 Capacitor designing method of MOS transistor
10/12/1999US5966517 Semiconductor device using diode place-holders and method of manufacture thereof
10/12/1999US5966499 System for delivering a substantially constant vapor flow to a chemical process reactor
10/12/1999US5966394 Laser diode controller
10/12/1999US5966341 Semiconductor memory
10/12/1999US5966333 Semiconductor memory device
10/12/1999US5966326 Nonvolatile semiconductor memory equipped with single bit and multi-bit cells
10/12/1999US5966325 Semiconductor memory device with improved read speed
10/12/1999US5966322 Giant magnetoresistive effect memory cell
10/12/1999US5966321 SRAM cell having increased cell ratio
10/12/1999US5966317 Memory cell
10/12/1999US5966316 Semiconductor memory device having storage capacity of 22N+1 bits
10/12/1999US5966312 Method for monitoring and analyzing manufacturing processes using statistical simulation with single step feedback
10/12/1999US5966290 Electronic packages and a method to improve thermal performance of electronic packages
10/12/1999US5966216 For use in aligning a mask and wafer in lithography
10/12/1999US5966215 Photolithographic alignment system
10/12/1999US5966202 Adjustable slit
10/12/1999US5966200 Charged particle beam exposure apparatus
10/12/1999US5966190 Array substrate for displaying device with capacitor lines having particular connections
10/12/1999US5966043 Power supply switching circuit
10/12/1999US5966024 Sensitive method of evaluating process induced damage in MOSFETs using a differential amplifier operational principle
10/12/1999US5966022 Wafer level burn-in system
10/12/1999US5966019 System and method for measuring properties of a semiconductor substrate in a fabrication line
10/12/1999US5965968 Electrostatic motor
10/12/1999US5965948 Semiconductor device having doubled pads
10/12/1999US5965947 Structure of a semiconductor package including chips bonded to die bonding pad with conductive adhesive and chips bonded with non-conductive adhesive containing insulating beads
10/12/1999US5965946 Package having Au layer semiconductor device having Au layer
10/12/1999US5965945 Lead solder bump shield
10/12/1999US5965943 Semiconductor device with bonding pad electrode
10/12/1999US5965942 Semiconductor memory device with amorphous diffusion barrier between capacitor and plug
10/12/1999US5965941 Use of dummy underlayers for improvement in removal rate consistency during chemical mechanical polishing
10/12/1999US5965940 Integrated circuit structure
10/12/1999US5965939 Semiconductor device and a method of manufacture
10/12/1999US5965938 Integrated two-tiered via-plug to improve metal lithography # 4
10/12/1999US5965934 Multilayer photoresist
10/12/1999US5965933 Semiconductor packaging apparatus
10/12/1999US5965932 Contamination free source for shallow low energy junction implants using implanted molecules containing titanium and boron
10/12/1999US5965930 High frequency bipolar transistor and method of forming the same
10/12/1999US5965929 Bipolar Silicon transistor with arsenic and phosphorous ratio
10/12/1999US5965928 Semiconductor device with MOS capacitor and fabrication method thereof
10/12/1999US5965926 Circuit structure having at least one MOS transistor and method for its production
10/12/1999US5965923 Lateral bipolar transistor and apparatus using same
10/12/1999US5965921 High voltage inverter circuit
10/12/1999US5965920 Input protection circuit
10/12/1999US5965919 Semiconductor device and a method of fabricating the same
10/12/1999US5965918 Semiconductor device including field effect transistor
10/12/1999US5965917 Structure and method of formation of body contacts in SOI MOSFETS to elimate floating body effects
10/12/1999US5965915 Laser processing method, method for forming a flash memory, insulated gate semiconductor device and method for forming the same
10/12/1999US5965914 Thin film transistor having a branched gate and channel
10/12/1999US5965913 Dense vertical programmable read only memory cell structures and processes for making them
10/12/1999US5965912 Variable capacitor and method for fabricating the same
10/12/1999US5965911 Mos transistor adopting titanium-carbon-nitride gate electrode and manufacturing method thereof
10/12/1999US5965909 Semiconductor device having high gate turn-on voltage
10/12/1999US5965908 Epitaxial wafer and manufacturing method thereof as well as light-emitting diode with enhanced luminance
10/12/1999US5965906 Liquid crystal display element and manufacturing method thereof
10/12/1999US5965905 Thin-film transistor and SRAM memory cell equipped therewith
10/12/1999US5965904 Semiconductor device comprising silicon semiconductor layer
10/12/1999US5965894 Method of operating a particle-optical apparatus
10/12/1999US5965465 Etching of silicon nitride
10/12/1999US5965464 Manufacturing method of double spacer structure for mixed-mode IC
10/12/1999US5965463 Silicon oxide
10/12/1999US5965462 Method for forming a gate structure used in borderless contact etching
10/12/1999US5965461 Controlled linewidth reduction during gate pattern formation using a spin-on barc
10/12/1999US5965459 Method for removing crevices induced by chemical-mechanical polishing
10/12/1999US5965446 Dissolving flourescent molecule in volatile, organic solvent; placing paper on substrate, dropping the sample solution onto the paper, pulling the paper allowing sample to traverse the surface, radiating with laser light, measuring fluorescence
10/12/1999US5965328 Irradiating coating film with radiation through a mask, developing said coating film with an alkali developer solution, electroplating, peeling
10/12/1999US5965310 Process of patterning photo resist layer extending over step of underlying layer without deformation of pattern
10/12/1999US5965308 Method of controlling exposure
10/12/1999US5965302 Photomask includes a light blocking region forming a boundary between a first region and a second region on the substrate, light blocking region is narrow enough that it is not projected on the resist; making memory cells
10/12/1999US5965301 Physically removing the defect by applying actinic radiation except to a predetermined width of the edge; removing the edge by chemical etching which doesn't extend to other layers fineness; accuracy; semiconductors; integrated circuits
10/12/1999US5965219 Misted deposition method with applied UV radiation
10/12/1999US5965212 Method of producing metal quantum dots
10/12/1999US5965203 Method for depositing a silicon oxide layer
10/12/1999US5965200 Processing apparatus and processing method
10/12/1999US5965197 Mixing dispersoid particles with solder particles to coat surface, subjecting to plastic deformation to reduce thickness
10/12/1999US5965193 Process for preparing a ceramic electronic circuit board and process for preparing aluminum or aluminum alloy bonded ceramic material
10/12/1999US5965064 For establishing electric connection between terminals of an integrated circuit chip and a circuit pattern at low cost with high reliabilities in the establishment of electric connection and in the insulation upon connection without short circuiting
10/12/1999US5965047 Rapid thermal processing (RTP) system with rotating substrate
10/12/1999US5965046 Method and apparatus for baking out a gate valve in a semiconductor processing system
10/12/1999US5965043 Method for using ultrasonic treatment in combination with UV-lasers to enable plating of high aspect ratio micro-vias
10/12/1999US5965036 Microetching composition for copper or copper alloy
1 ... 5628 5629 5630 5631 5632 5633 5634 5635 5636 5637 5638 5639 5640 5641 5642 5643 5644 5645 5646 5647 5648 ... 6590