Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/1999
10/19/1999US5970309 Metal nitride or carbide layer on polysilicon nodes
10/19/1999US5970214 Heating device for semiconductor wafers
10/19/1999US5970213 Apparatus for heating a transparent substrate utilizing an incandescent lamp and a heating disk emitting infrared wavelengths
10/19/1999US5970168 Fourier filtering mechanism for inspecting wafers
10/19/1999US5970114 X-ray mask and its fabrication method
10/19/1999US5970016 Dynamic semiconductor memory device with banks capable of operating independently
10/19/1999US5970010 Semiconductor memory device
10/19/1999US5970006 Semiconductor memory device having cell array divided into a plurality of cell blocks
10/19/1999US5970003 Semiconductor memory device
10/19/1999US5969998 MOS semiconductor device with memory cells each having storage capacitor and transfer transistor
10/19/1999US5969992 EEPROM cell using P-well for tunneling across a channel
10/19/1999US5969990 Nonvolatile memory array with NAND string memory cell groups selectively connected to sub bit lines
10/19/1999US5969989 Semiconductor memory device capable of storing plural-bit data in a single memory cell
10/19/1999US5969984 Level converting circuit for converting level of an input signal, internal potential generating circuit for generating internal potential, internal potential generating unit generating internal potential, highly reliable semiconductor device
10/19/1999US5969983 Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer
10/19/1999US5969982 Ferroelectric memory devices having linear reference cells therein and methods of operating same
10/19/1999US5969977 Electronic memory device having bit lines with block selector switches
10/19/1999US5969945 Electronic package assembly
10/19/1999US5969935 Use of calcium and strontium dopants to improve retention performance in a PZT ferroelectric film
10/19/1999US5969934 Electrostatic wafer clamp having low particulate contamination of wafers
10/19/1999US5969929 Distributed ESD protection device for high speed integrated circuits
10/19/1999US5969923 Electrostatic protection structure for MOS circuits
10/19/1999US5969922 Failure indicator for a protection component
10/19/1999US5969857 Stage assembly of microscope which prevents its particles of wear from being dispersed
10/19/1999US5969805 Method and apparatus employing external light source for endpoint detection
10/19/1999US5969802 Exposure apparatus
10/19/1999US5969801 Correction method and correction apparatus of mask pattern
10/19/1999US5969800 Scanning exposure apparatus and method
10/19/1999US5969799 Exposure apparatus with a pulsed laser
10/19/1999US5969782 Active matrix liquid crystal display having interdigitated pixel and first counter electrodes in the same plane and a second counter connected to the first counter electrode via a contact hole in a insulating layer
10/19/1999US5969702 Liquid crystal panel with a plurality of light shielding portions over a substrate including a pixel region and a driver circuit region
10/19/1999US5969564 Insulated-gate field effect transistor and method for driving thereof
10/19/1999US5969563 Input and output circuit with wide voltage tolerance
10/19/1999US5969544 Clock driver circuit and semiconductor integrated circuit device incorporating the clock driver circuit
10/19/1999US5969535 Probe card with connector
10/19/1999US5969534 Semiconductor testing apparatus
10/19/1999US5969533 Probe card and LSI test method using probe card
10/19/1999US5969461 Surface acoustic wave device package and method
10/19/1999US5969441 Two-dimensionally balanced positioning device with two object holders, and lithographic device provided with such a positioning device
10/19/1999US5969428 Alignment mark, manufacturing method thereof, exposing method using the alignment mark, semiconductor device manufactured using the exposing method
10/19/1999US5969427 Use of an oxide surface to facilitate gate break on a carrier substrate for a semiconductor device
10/19/1999US5969426 Substrateless resin encapsulated semiconductor device
10/19/1999US5969425 Borderless vias with CVD barrier layer
10/19/1999US5969423 Aluminum-containing films derived from using hydrogen and oxygen gas in sputter deposition
10/19/1999US5969422 Plated copper interconnect structure
10/19/1999US5969421 Integrated circuit conductors that avoid current crowding
10/19/1999US5969420 Semiconductor device comprising a plurality of interconnection patterns
10/19/1999US5969419 Structure comprising platinum layer bound to a surface of a silicon oxide layer
10/19/1999US5969418 Method of attaching a chip to a flexible substrate
10/19/1999US5969416 Ball grid array semiconductor package
10/19/1999US5969411 Lead frame with increased strength and manufacture of semiconductor device
10/19/1999US5969409 Combined in-situ high density plasma enhanced chemical vapor deposition (HDPCVD) and chemical mechanical polishing (CMP) process to form an intermetal dielectric layer with a stopper layer embedded therein
10/19/1999US5969408 Process for forming a morphological edge structure to seal integrated electronic devices, and corresponding device
10/19/1999US5969407 MOSFET device with an amorphized source
10/19/1999US5969406 High linearity capacitor using a damascene tungsten stud as the bottom electrode
10/19/1999US5969405 Integrated circuit structure having an active microwave component and at least one passive component
10/19/1999US5969404 Silicide agglomeration device
10/19/1999US5969403 Physical fuse for semiconductor integrated circuit
10/19/1999US5969402 Slot filled with tungsten.
10/19/1999US5969401 Silicon on insulator substrate with improved insulation patterns
10/19/1999US5969398 Method for producing a semiconductor device and a semiconductor device
10/19/1999US5969397 Low defect density composite dielectric
10/19/1999US5969396 Semiconductor device and method of fabricating the same
10/19/1999US5969395 Integrated circuit memory devices with high and low dopant concentration regions of different diffusivities
10/19/1999US5969394 Method and structure for high aspect gate and short channel length insulated gate field effect transistors
10/19/1999US5969393 Semiconductor device and method of manufacture of the same
10/19/1999US5969392 Thermal ink jet printheads with power MOS driver devices having enhanced transconductance
10/19/1999US5969391 Complementary insulated-gate field-effect transistors having improved anti-latchup characteristic
10/19/1999US5969388 Mos device and method of fabricating the same
10/19/1999US5969387 Lateral thin-film SOI devices with graded top oxide and graded drift region
10/19/1999US5969386 Aluminum gates including ion implanted composite layers
10/19/1999US5969385 Ultra-low power-delay product NNN/PPP logic devices
10/19/1999US5969384 Flash memory having separate data programming and erasing terminals
10/19/1999US5969383 Split-gate memory device and method for accessing the same
10/19/1999US5969382 EPROM in high density CMOS having added substrate diffusion
10/19/1999US5969381 Semiconductor device with unbreakable testing elements for evaluating components and process of fabrication thereof
10/19/1999US5969379 Memory and other integrated circuitry having a conductive interconnect line pitch of less than 0.6 micron
10/19/1999US5969377 Liquid crystal display device integrated with driving circuit and method for fabricating the same
10/19/1999US5969376 Organic thin film transistor having a phthalocyanine semiconductor layer
10/19/1999US5969368 Backside thinning using ion-beam figuring
10/19/1999US5969364 Wafer fixing unit for focused ion beam apparatus
10/19/1999US5969262 Method and apparatus for testing junction strength of electrode
10/19/1999US5968851 Controlled isotropic etch process and method of forming an opening in a dielectric layer
10/19/1999US5968850 Wiring using chromium nitride and methods of fabrication therefor, liquid crystal display panels using the same wiring and methods of fabrication therefor
10/19/1999US5968849 Etching
10/19/1999US5968848 Process for treating a lithographic substrate and a rinse solution for the treatment
10/19/1999US5968847 Process for copper etch back
10/19/1999US5968846 Method for removing silicon nitride material
10/19/1999US5968845 Method for etching a compound semiconductor, a semi-conductor laser device and method for producing the same
10/19/1999US5968844 Method for etching nitride features in integrated circuit construction
10/19/1999US5968843 Method of planarizing a semiconductor topography using multiple polish pads
10/19/1999US5968842 Techniques for reduced dishing in chemical mechanical polishing
10/19/1999US5968841 Device and method for preventing settlement of particles on a chemical-mechanical polishing pad
10/19/1999US5968840 Dynamic random access memory using silicon-on-insulator techniques
10/19/1999US5968711 Method of dry etching A1Cu using SiN hard mask
10/19/1999US5968710 Silicon wafers with cresol-formaldehyde phenolic resin coatings
10/19/1999US5968693 Lens system with photoresists for latent images, interrogation and adjustment
10/19/1999US5968692 Integrated circuit pattern lithography method capable of reducing the number of shots in partial batch exposure
10/19/1999US5968686 Charged-beam exposure mask and charged-beam exposure method
10/19/1999US5968670 Enhanced ceramic ball grid array using in-situ solder stretch with spring