Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/1999
10/20/1999EP0950191A1 Contact probe unit
10/20/1999EP0950190A1 Micromechanical semiconductor array and method for the production thereof
10/20/1999EP0950132A1 CaTiO 3? INTERFACIAL TEMPLATE STRUCTURE ON SUPERCONDUCTOR
10/20/1999EP0950082A1 Reducing void formation in curable adhesive formulations
10/20/1999EP0949984A1 Rotatable and translatable spray nozzle
10/20/1999EP0895512B1 Pin layer sequence on a perovskite
10/20/1999EP0843825B1 Semiconductor wafer test and burn-in
10/20/1999EP0731972A4 A capacitorless dram device on silicon-on-insulator substrate
10/20/1999CN1232601A Plasma etching reactor and method for use it in new appeared film
10/20/1999CN1232578A Selective etch for II-VI semiconductors
10/20/1999CN1232574A Process for producing barrier-free semiconductor storage assemblies
10/20/1999CN1232552A Antireflective coating for photoresist compositions
10/20/1999CN1232551A Light sensitive composition contg. arylhydrazo dye
10/20/1999CN1232550A Bottom antireflective coatings contg. arylhydrazo dye
10/20/1999CN1232511A Ion plating apparatus
10/20/1999CN1232300A Semiconductor device and fabrication method
10/20/1999CN1232299A Semiconductor device
10/20/1999CN1232296A Static semiconductor memory device
10/20/1999CN1232295A Nonvolatile semiconductor memory and method of manufacturing the nonvolatile semiconductor memory
10/20/1999CN1232294A Ferroelectric memory device with improved ferroelectric capacity characteristic
10/20/1999CN1232293A Structure and method for mounting electronic part
10/20/1999CN1232292A Miniaturized contact in semiconductor substrate and method for forming the same
10/20/1999CN1232291A Copper interconnect structure and method of formation
10/20/1999CN1232290A Shallow slot isolating method for avoiding dishing
10/20/1999CN1232289A Wafer carrier with minimal contact
10/20/1999CN1232288A Probe end cleaning sheet
10/20/1999CN1232287A Method of manufacturing semiconductor device
10/20/1999CN1232286A Ion implantation apparatus
10/20/1999CN1232185A Pallet transfer arm, changing device and treatment method, and IC test device
10/20/1999CN1232184A IC test device
10/20/1999CN1231966A Method for packaging ink jet printing head
10/20/1999CN1231949A Electrode of electronic component part and conductive paste coating device
10/20/1999CN1045844C Method of fabricating thin-film transistor
10/19/1999US5970384 Nitrogen concentration is increased, dinitrogen monoxide
10/19/1999US5970383 Method of manufacturing a semiconductor device with improved control of deposition layer thickness
10/19/1999US5970382 Process for forming coatings on semiconductor devices
10/19/1999US5970381 Method for fabricating organic thin film
10/19/1999US5970380 Methods of forming semiconductor switching devices having silicide regions therein
10/19/1999US5970379 Method of reducing loss of metal silicide in pre-metal etching
10/19/1999US5970378 Chemical vapor deposition (cvd) method employing a tetrakis-diallylamido titanium source material
10/19/1999US5970377 Etching back the metal film on the first aluminum alloy
10/19/1999US5970376 Post via etch plasma treatment method for forming with attenuated lateral etching a residue free via through a silsesquioxane spin-on-glass (SOG) dielectric layer
10/19/1999US5970375 Semiconductor fabrication employing a local interconnect
10/19/1999US5970374 Method for forming contacts and vias with improved barrier metal step-coverage
10/19/1999US5970373 Method for preventing oxidation in the formation of a via in an integrated circuit
10/19/1999US5970371 Method of forming sharp beak of poly to improve erase speed in split-gate flash EEPROM
10/19/1999US5970370 Manufacturing capping layer for the fabrication of cobalt salicide structures
10/19/1999US5970369 Semiconductor device with polysilicon layer of good crystallinity and its manufacture method
10/19/1999US5970368 Method for manufacturing polycrystal semiconductor film
10/19/1999US5970367 Double damascene pattering of silcon-on-insulator transistors
10/19/1999US5970366 Method of removing metallic contaminants from simox substrate
10/19/1999US5970365 Silicon wafer including amorphous silicon layer formed by PCVD and method of manufacturing wafer
10/19/1999US5970364 Method of nitride-sealed oxide-buffered local oxidation of silicon
10/19/1999US5970363 Shallow trench isolation formation with improved trench edge oxide
10/19/1999US5970362 Simplified shallow trench isolation formation with no polish stop
10/19/1999US5970361 Anodizing the non-porous substrate while changing electric current density
10/19/1999US5970360 DRAM cell with a roughened poly-Si electrode
10/19/1999US5970359 Method of forming a capacitor for DRAM
10/19/1999US5970358 Method for forming a capacitor wherein the first capacitor plate includes electrically coupled conductive layers separated by an intervening insulative layer
10/19/1999US5970357 Method and structure for manufacturing high-resistance polysilicon loads in a semiconductor process
10/19/1999US5970356 Method for fabricating a bipolar transistor
10/19/1999US5970355 Method for fabricating semiconductor device
10/19/1999US5970354 Poly recessed fabrication method for defining high performance MOSFETS
10/19/1999US5970353 Reduced channel length lightly doped drain transistor using a sub-amorphous large tilt angle implant to provide enhanced lateral diffusion
10/19/1999US5970352 Field effect transistor having elevated source and drain regions and methods for manufacturing the same
10/19/1999US5970351 Production method for a MISFET, complementary MISFET
10/19/1999US5970350 Semiconductor device having a thin gate oxide and method of manufacture thereof
10/19/1999US5970349 Semiconductor device having one or more asymmetric background dopant regions and method of manufacture thereof
10/19/1999US5970348 Read-only memory and corresponding method of manufacturing by MOS technology
10/19/1999US5970347 High performance mosfet transistor fabrication technique
10/19/1999US5970346 Moisture barrier
10/19/1999US5970345 Method of forming an integrated circuit having both low voltage and high voltage MOS transistors
10/19/1999US5970344 Method of manufacturing semiconductor device having gate electrodes formed in trench structure before formation of source layers
10/19/1999US5970343 Fabrication of conductivity enhanced MOS-gated semiconductor devices
10/19/1999US5970342 Method of forming high capacitive-coupling ratio and high speed flash memories with a textured tunnel oxide
10/19/1999US5970341 Method for forming vertical channels in split-gate flash memory cell
10/19/1999US5970340 Method for making semiconductor device incorporating an electrical contact to an internal conductive layer
10/19/1999US5970339 Method of manufacturing a dynamic access memory which is suitable for increasing integration and suppressing generation of leakage current using an SOI structure
10/19/1999US5970338 Method of producing an EEPROM semiconductor structure
10/19/1999US5970337 Ferroelectric film capacitor with intergranular insulation
10/19/1999US5970336 Method of making memory cell incorporating a chalcogenide element
10/19/1999US5970335 Semiconductor processing method of forming complementary n-type doped and p-type doped active regions within a semiconductor substrate
10/19/1999US5970334 Method of manufacturing contacts to diverse doped regions using intermediate layer of arsenic or phosphorus
10/19/1999US5970333 Dielectric isolation bipolar transistor
10/19/1999US5970332 Method of manufacturing a semiconductor device with a BiCMOS circuit
10/19/1999US5970331 Method of making a plug transistor
10/19/1999US5970330 Method of making field effect transistor with higher mobility
10/19/1999US5970329 Method of forming power semiconductor devices having insulated gate electrodes
10/19/1999US5970328 Fabrication method of T-shaped gate electrode in semiconductor device
10/19/1999US5970327 Liquid crystal display device of an active matrix type, introducing a metallic element capable of accelerating the crystallization of the amorphous silicon film
10/19/1999US5970326 Thin film transistor films made with anodized film and reverse-anodized etching technique
10/19/1999US5970325 Thin-film switching device having chlorine-containing active region and methods of fabrication therefor
10/19/1999US5970322 Ultrahigh-frequency electronic component and method of manufacturing the same
10/19/1999US5970321 Method of fabricating a microelectronic package having polymer ESD protection
10/19/1999US5970319 Method for assembling an integrated circuit chip package having at least one semiconductor device
10/19/1999US5970314 Process for vapor phase epitaxy of compound semiconductor
10/19/1999US5970313 Monitoring wafer temperature during thermal processing of wafers by measuring sheet resistance of a test wafer
10/19/1999US5970312 Method for evaluating HSG silicon film of semiconductor device by atomic force microscopy
10/19/1999US5970311 Method and structure for optimizing the performance of a semiconductor device having dense transistors
10/19/1999US5970310 Method for manufacturing multilayer wiring board and wiring pattern forming apparatus
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