Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2000
01/26/2000EP0975011A1 Semiconductor substrate and method of producing same
01/26/2000EP0975010A1 Prevention of photoresist poisoning from dielectric antireflective coating in semiconductor fabrication
01/26/2000EP0975009A1 Wafer transfer mechanism
01/26/2000EP0975008A1 Method and device for treating a flat workpiece, in particular a semiconductor wafer
01/26/2000EP0975006A2 Plasma density measuring method, probe used for measuring plasma density and plasma density measuring apparatus
01/26/2000EP0975005A2 Method for controlling plasma-generating high frequency power, and plasma generating apparatus
01/26/2000EP0974905A2 An integrated circuit memory device with redundancy
01/26/2000EP0974868A2 Exposure apparatus
01/26/2000EP0974817A1 Circuit board and detector, and method for manufacturing the same
01/26/2000EP0974565A1 Aluminum nitride sintered body and method of preparing the same
01/26/2000EP0974166A1 Nonvolatile semiconductor memory
01/26/2000EP0974165A2 Semiconductor device with a bipolar transistor, and method of manufacturing such a device
01/26/2000EP0974164A2 Thin film transistors and electronic devices comprising such
01/26/2000EP0974161A1 Semiconductor component with a structure for preventing onset of cross currents
01/26/2000EP0974160A1 Process of manufacturing a semiconductor device including a buried channel field effect transistor
01/26/2000EP0974159A1 Mos transistor with high doping gradient under the grid
01/26/2000EP0974158A2 Method of manufacturing a semiconductor device
01/26/2000EP0974157A1 Component taping method and apparatus
01/26/2000EP0974147A1 Electrically erasable nonvolatile memory
01/26/2000EP0974146A1 Nonvolatile memory
01/26/2000EP0973964A1 Low defect density, self-interstitial dominated silicon
01/26/2000EP0973963A1 Low defect density silicon
01/26/2000EP0973962A1 Low defect density, ideal oxygen precipitating silicon
01/26/2000EP0813745B1 Electron beam pattern-writing column
01/26/2000EP0725975B1 Detection system for measuring high aspect ratio
01/26/2000EP0617363B1 Defective cell substitution in EEprom array
01/26/2000CN1242904A Display type image sensor
01/26/2000CN1242874A lateral bipolar field effect mode hydrid transistor and method for mfg. same
01/26/2000CN1242873A Laser based method and system for integrated circuit repair or reconfigration
01/26/2000CN1242872A Wafer transfer device
01/26/2000CN1242860A Sound encoder and sound decoder
01/26/2000CN1242753A Waffer transport device
01/26/2000CN1242729A Composition and slurry useful for metal CMP
01/26/2000CN1242608A Field effect transistor
01/26/2000CN1242607A Non-volatile semiconductor memory device and process for producing the same
01/26/2000CN1242605A Microstructure including circuit integrated in substrate on one surface of which is arranged flat coil
01/26/2000CN1242604A 半导体保护器件和功率转换器件 Semiconductor protection devices and power conversion devices
01/26/2000CN1242603A Wiring board for bump bonding, semiconductor device assembled from wiring board and mfg. method of wiring board for bump bonding
01/26/2000CN1242602A Wafer-scale package structure and circuit board used therein
01/26/2000CN1242601A Method for capacitor of dynamic random access memory device
01/26/2000CN1242600A Method for mfg. capacitor of stack type dynamic random access memory device
01/26/2000CN1242599A Non-contact, non-invasive method of sorting CMOS chips
01/26/2000CN1242598A Moulding resin for sealing electronic element, method and apparatus therefor
01/26/2000CN1242597A Device structure with layer for facilitating passivation of surface states
01/26/2000CN1242596A Method of mfg. semiconductor device
01/26/2000CN1242595A Silicon oxynitride cap for fluorinated silicate glass film in intermetal dielectric semiconductor fabrication
01/26/2000CN1242594A Method for implanting negative hydrogen ion and implanting apparatus
01/26/2000CN1242511A System and method for optically measuring dielectric thickness in semiconductor devices
01/26/2000CN1242404A Epoxy resin composition for bonding semiconductor chips
01/26/2000CN1242349A Aluminum nitride sintered body and method of preparing the same
01/26/2000CN1242335A Wafer shipper and package
01/26/2000CN1048824C Chip carrier and method for producing same,and use thereof
01/26/2000CN1048823C Capacitor of integrated circuit, and method for mfg. same
01/26/2000CN1048822C Method for making fine annular charge storage electrode in a semiconductor device
01/26/2000CN1048821C Method for forming isolation in semiconductor device
01/26/2000CN1048820C Method for making multi-layer amorphous silicon
01/26/2000CN1048819C Method for fabricating diffusion barrier metal layer in semiconductor device
01/25/2000USRE36531 Semiconductor memory device including memory cells connected to a ground line
01/25/2000US6018815 Adaptable scan chains for debugging and manufacturing test purposes
01/25/2000US6018811 Layout for semiconductor memory device wherein intercoupling lines are shared by two sets of fuse banks and two sets of redundant elements not simultaneously active
01/25/2000US6018688 Apparatus and method for determining whether to load a workpiece into a working device using stored and updated status flags
01/25/2000US6018622 Method for reducing circuit area by grouping compatible storage devices
01/25/2000US6018616 Thermal cycling module and process using radiant heat
01/25/2000US6018492 Semiconductor memory device
01/25/2000US6018491 Synchronous dynamic random access memory
01/25/2000US6018484 Method and apparatus for testing random access memory devices
01/25/2000US6018480 Method and system which permits logic signal routing over on-chip memories
01/25/2000US6018475 MOS memory point
01/25/2000US6018462 Multi-tip module
01/25/2000US6018252 Dual-power type integrated circuit
01/25/2000US6018249 Test system with mechanical alignment for semiconductor chip scale packages and dice
01/25/2000US6018196 Semiconductor flip chip package
01/25/2000US6018195 MOS gate structure semiconductor device
01/25/2000US6018191 Semiconductor device
01/25/2000US6018189 Lead frame for face-down bonding
01/25/2000US6018188 Semiconductor device
01/25/2000US6018186 Three-dimensional, deep-trench, high-density read-only memory (ROM) and its manufacturing method
01/25/2000US6018185 Semiconductor device with element isolation film
01/25/2000US6018184 Semiconductor structure useful in a self-aligned contact having multiple insulation layers of non-uniform thickness
01/25/2000US6018182 Multilayer
01/25/2000US6018181 Thin film transistor and manufacturing method thereof
01/25/2000US6018180 Transistor formation with LI overetch immunity
01/25/2000US6018179 Transistors having a scaled channel length and integrated spacers with enhanced silicidation properties
01/25/2000US6018178 Fabrication process for a novel multi-storage EEPROM cell
01/25/2000US6018176 Vertical transistor and memory cell
01/25/2000US6018175 Gapped-plate capacitor
01/25/2000US6018174 Bottle-shaped trench capacitor with epi buried layer
01/25/2000US6018173 Vertically oriented capacitor structure with sloped contact opening and method for etching sloped contact openings in polysilicon
01/25/2000US6018172 Semiconductor memory device including memory cell transistors formed on SOI substrate and having fixed body regions
01/25/2000US6018171 Shallow junction ferroelectric memory cell having a laterally extending p-n junction and method of making the same
01/25/2000US6018170 Single-layer-electrode type two-phase charge coupled device having smooth charge transfer
01/25/2000US6018169 Photodetectors
01/25/2000US6018166 Multilayer; spacing between intakes and drains
01/25/2000US6018144 Method of conveying moieties through an IR conveyor furnace with controlled temperature profile for large area processing multichip modules
01/25/2000US6018065 Method of fabricating iridium-based materials and structures on substrates, iridium source reagents therefor
01/25/2000US6017829 Forming dielectric layer upon semiconductor substrate; doping metal into dielectric layer to form electrically conductive structure within dielectric layer that extends to top surface of dielectric layer
01/25/2000US6017828 Method for preventing backside polysilicon peeling in a 4T+2R SRAM process
01/25/2000US6017827 Introducing solvent and gas into pressurizable mixing module;setting pressure control to maintain pressure of gas; introducing solvent with dissolved gas and gas from mixing module into treatment vessel
01/25/2000US6017826 Forming blanket chlorine containing plasma etchable layer over substrate; forming blanket hard mask layer and patterned photoresist layer; etching; stripping from sidewall of patterned chlorine containing plasma layer passivation layer
01/25/2000US6017825 Etch rate loading improvement