Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2000
01/19/2000EP0972092A1 Multipurpose processing chamber for chemical vapor deposition processes
01/19/2000EP0971993A1 Planarization composition for removing metal films
01/19/2000EP0948818A4 High density trench dmos transistor with trench bottom implant
01/19/2000EP0836232A4 Tunnelling device and method of producing a tunnelling device
01/19/2000EP0807258B1 Test device for flat electronic assemblies
01/19/2000EP0799497B1 Semiconductor device with first and second level interconnects separated by low dielectric constant material and method of making the same
01/19/2000EP0792530A4 Low cost, high average power, high brightness solid state laser
01/19/2000EP0769986A4 Conveyor cassette for wafers
01/19/2000EP0708980B1 Method of fabricating an electronic device on a silicon on insulator wafer
01/19/2000EP0660757B1 Wafer retaining platen and lifting means
01/19/2000CN1242107A Electroplated interconnection structures on integrated circuit chips
01/19/2000CN1242106A Bump-bonded semiconductor imaging device
01/19/2000CN1242105A Resin-encapsulated semiconductor device and method for manufacturing the same
01/19/2000CN1242104A Aligner and method for exposure
01/19/2000CN1241820A Method of activating compound semiconductor layer to P-type compound semiconductor layer
01/19/2000CN1241818A Semiconductor device and manufacturing method
01/19/2000CN1241817A Semiconductor memory and manufacturing method thereof
01/19/2000CN1241816A MIS semiconductor device and method of fabricating the same
01/19/2000CN1241815A Chip size package and method of fabricating the same
01/19/2000CN1241813A Assembly technology for nanometer carbon tube and relevant electronic device
01/19/2000CN1241812A Method for forming semiconductor device
01/19/2000CN1241811A Self-aligned formation and method for semiconductor
01/19/2000CN1241810A Semiconductor fuse
01/19/2000CN1241809A Method and apparatus having improved control of buried strap in trench capacitors
01/19/2000CN1241808A Device and method for connecting two electronic components
01/19/2000CN1241807A Die attachment with reduced adhesive bleed-out
01/19/2000CN1241806A Process for patterning conductive line without after-corrosion and apparatus use in process
01/19/2000CN1241805A 半导体器件及其制造方法 Semiconductor device and manufacturing method thereof
01/19/2000CN1241804A Oxide-based method of making compound semiconductor film and making related electronic devices
01/19/2000CN1241803A Process for manufacturing semiconductor substrate as well as semiconductor thin film and multilayer structure
01/19/2000CN1241798A Ion source having wide output current operating range
01/19/2000CN1241725A IC test device
01/19/2000CN1241649A Method of producing movable microstructure
01/19/2000CN1241646A Copper-to-sulfur atom ratio regulating technology for cuprous sulfide film
01/19/2000CN1241457A Method for cleaning PZT thin film
01/19/2000CN1048596C Rectifying transfer gate circuit
01/18/2000USRE36518 Method for making electrical contact with an active area through sub-micron contact openings and a semiconductor device
01/18/2000US6016562 Inspection data analyzing apparatus for in-line inspection with enhanced display of inspection results
01/18/2000US6016391 Apparatus and method for optimizing integrated circuit fabrication
01/18/2000US6016383 Rapid thermal heating apparatus and method including an infrared camera to measure substrate temperature
01/18/2000US6016358 Method and apparatus for aligning the position of die on a wafer table
01/18/2000US6016278 Failure analysis method and device
01/18/2000US6016269 Quantum random address memory with magnetic readout and/or nano-memory elements
01/18/2000US6016267 High speed, high bandwidth, high density, nonvolatile memory system
01/18/2000US6016266 Semiconductor device with a ferroelectric capacitor
01/18/2000US6016187 Exposure apparatus and method
01/18/2000US6016185 Lens array photolithography
01/18/2000US6016174 Method for manufacturing electro-optic element
01/18/2000US6016087 Coupled microstrip lines
01/18/2000US6016073 BiCMOS negative charge pump
01/18/2000US6016036 Magnetic filter for ion source
01/18/2000US6016019 Capacitor array arrangement for improving capacitor array matching
01/18/2000US6016013 Semiconductor device mounting structure
01/18/2000US6016012 In channel between a dielectric material and conductive material deposited on surface of a dielectric material
01/18/2000US6016011 Method and apparatus for a dual-inlaid damascene contact to sensor
01/18/2000US6016010 Voidless metallization on titanium aluminide in an interconnect
01/18/2000US6016009 Integrated circuit with tungsten plug containing amorphization layer
01/18/2000US6016008 Integrated circuit interconnection employing tungsten/aluminum layers
01/18/2000US6016006 Thermal grease insertion and retention
01/18/2000US6016005 Multilayer, high density micro circuit module and method of manufacturing same
01/18/2000US6016004 Method and apparatus for epoxy loc die attachment
01/18/2000US6016003 Chip-lead interconnection structure in a semiconductor device
01/18/2000US6015997 Semiconductor structure having a doped conductive layer
01/18/2000US6015996 Cell structure of an improved CMOS static RAM and its fabrication method
01/18/2000US6015995 ROM diode structure
01/18/2000US6015994 Semiconductor memory device and manufacturing method thereof
01/18/2000US6015992 Bistable SCR-like switch for ESD protection of silicon-on-insulator integrated circuits
01/18/2000US6015991 Asymmetrical field effect transistor
01/18/2000US6015990 Semiconductor memory device and method of manufacturing the same
01/18/2000US6015989 Semiconductor device having a capacitor electrode formed of iridum or ruthenium and a quantity of oxygen
01/18/2000US6015988 Microstructure and methods for fabricating such structure
01/18/2000US6015987 Semiconductor device having capacitor exhibiting improved mositure resistance and manufacturing method thereof
01/18/2000US6015986 Rugged metal electrodes for metal-insulator-metal capacitors
01/18/2000US6015985 Deep trench with enhanced sidewall surface area
01/18/2000US6015984 Capacitor with oxide/nitride/oxide composite dielectric suitable for embedded nonvolatile memory in analog applications
01/18/2000US6015983 Bitline contact structures and DRAM array structures
01/18/2000US6015982 Lateral bipolar field effect mode hybrid transistor and method for operating the same
01/18/2000US6015980 Metal layered semiconductor laser
01/18/2000US6015978 Resonance tunnel device
01/18/2000US6015976 Fabrication apparatus employing energy beam
01/18/2000US6015975 Method and apparatus for charged particle beam exposure
01/18/2000US6015955 Reworkability solution for wirebound chips using high performance capacitor
01/18/2000US6015762 Plasma CVD method
01/18/2000US6015761 Microwave-activated etching of dielectric layers
01/18/2000US6015760 Method for enhancing oxide to nitride selectivity through the use of independent heat control
01/18/2000US6015759 Surface modification of semiconductors using electromagnetic radiation
01/18/2000US6015758 Method of stripping a wafer of its film with gas injected into a CVD apparatus in which the wafer is disposed
01/18/2000US6015757 Method of oxide etching with high selectivity to silicon nitride by using polysilicon layer
01/18/2000US6015756 Trench-shaped read-only memory and its method of fabrication
01/18/2000US6015755 Method of fabricating a trench isolation structure using a reverse mask
01/18/2000US6015754 Chemical mechanical polishing apparatus and method
01/18/2000US6015753 Method of forming a self-aligned silicide
01/18/2000US6015752 Elevated salicide technology
01/18/2000US6015751 Self-aligned connection to underlayer metal lines through unlanded via holes
01/18/2000US6015749 Method to improve adhesion between copper and titanium nitride, for copper interconnect structures, via the use of an ion implantation procedure
01/18/2000US6015748 Methods of fabricating integrated circuit memory devices including silicide blocking layers on memory cell transistor source and drain regions
01/18/2000US6015747 Method of metal/polysilicon gate formation in a field effect transistor
01/18/2000US6015746 Method of fabricating semiconductor device with a gate-side air-gap structure
01/18/2000US6015745 Method for semiconductor fabrication
01/18/2000US6015743 Semiconductor processing method of providing a conductively doped layer of hemispherical grain polysilicon and a hemispherical grain polysilicon layer produced according to the method