| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 09/05/2000 | US6114724 Nonvolatile semiconductor memory cell with select gate |
| 09/05/2000 | US6114723 Flash memory cell using poly to poly tunneling for erase |
| 09/05/2000 | US6114722 Microcrystalline silicon structure and fabrication process |
| 09/05/2000 | US6114721 Dynamic random access memory device and method for producing the same |
| 09/05/2000 | US6114720 Capacitor and conductive line constructions |
| 09/05/2000 | US6114718 Solid state image sensor and its fabrication |
| 09/05/2000 | US6114716 Heterolithic microwave integrated circuits |
| 09/05/2000 | US6114709 Electron-beam transfer-exposure apparatus and method |
| 09/05/2000 | US6114708 Electron-beam exposure apparatus and exposure method |
| 09/05/2000 | US6114706 Method and apparatus for predicting process characteristics of polyurethane pads |
| 09/05/2000 | US6114705 System for correcting eccentricity and rotational error of a workpiece |
| 09/05/2000 | US6114662 Continual flow rapid thermal processing apparatus and method |
| 09/05/2000 | US6114450 Aryl Cyanate and/or diepoxide and tetrahydropyranyl-protected hydroxymethylated phenolic or hydroxystyrene resin |
| 09/05/2000 | US6114422 A chemically amplified copolymer of p-hydroxystyrene and a (meth)acrylate of an hydroxyalkylmalonate along with a photoacid generator; fineness of resolution for semiconductor chips; thermal properties |
| 09/05/2000 | US6114259 To protect dielectric material from damage during removal of photoresist mask materials |
| 09/05/2000 | US6114258 Integrated circuits |
| 09/05/2000 | US6114257 Process for modified oxidation of a semiconductor substrate using chlorine plasma |
| 09/05/2000 | US6114256 Using a ternary, amorphous ti--si--n diffusion barrier |
| 09/05/2000 | US6114255 For use in active area lithography and gate area lithography steps in the formation of a semiconductor integrated circuit |
| 09/05/2000 | US6114254 Method for removing contaminants from a semiconductor wafer |
| 09/05/2000 | US6114253 Forming a via on a semiconductor wafer |
| 09/05/2000 | US6114252 Plasma processing tools, dual-source plasma etchers, dual-source plasma etching methods, and methods of forming planar coil dual-source plasma etchers |
| 09/05/2000 | US6114251 Fabricating a liner on oxide film in an electrical isolation trench in a substrate; integrated circuits |
| 09/05/2000 | US6114250 In a plasma processing chamber |
| 09/05/2000 | US6114249 Chemical mechanical polishing of multiple material substrates and slurry having improved selectivity |
| 09/05/2000 | US6114248 Process to reduce localized polish stop erosion |
| 09/05/2000 | US6114247 Polishing cloth for use in a CMP process and a surface treatment thereof |
| 09/05/2000 | US6114246 Method of using a polish stop film to control dishing during copper chemical mechanical polishing |
| 09/05/2000 | US6114245 Method of processing semiconductor wafers |
| 09/05/2000 | US6114243 Preventing copper contamination of an intermetal dielectric layer during via or dual damascene etching in the fabrication of an integrated circuit device |
| 09/05/2000 | US6114242 MOCVD molybdenum nitride diffusion barrier for Cu metallization |
| 09/05/2000 | US6114241 Method of manufacturing a semiconductor device capable of reducing contact resistance |
| 09/05/2000 | US6114240 Method for fabricating semiconductor components using focused laser beam |
| 09/05/2000 | US6114239 Relates to semiconductor flip chip technology and more particularly to conductive epoxy attachment of a die pad to a supporting substrate |
| 09/05/2000 | US6114238 Self-aligned metal nitride for copper passivation |
| 09/05/2000 | US6114237 Method of forming contacts for a semiconductor device |
| 09/05/2000 | US6114236 Process for production of semiconductor device having an insulating film of low dielectric constant |
| 09/05/2000 | US6114235 Forming a local interconnect to a contact surface located below a dielectric layer within a semiconductor wafer stack |
| 09/05/2000 | US6114234 Method of making a semiconductor with copper passivating film |
| 09/05/2000 | US6114233 Dual damascene process using low-dielectric constant materials |
| 09/05/2000 | US6114232 Method for making an electrical contact to a node location and process for forming a conductive line or other circuit component |
| 09/05/2000 | US6114231 Wafer structure for securing bonding pads on integrated circuit chips and a method for fabricating the same |
| 09/05/2000 | US6114230 Nitrogen ion implanted amorphous silicon to produce oxidation resistant and finer grain polysilicon based floating gates |
| 09/05/2000 | US6114229 Polysilicon gate electrode critical dimension and drive current control in MOS transistor fabrication |
| 09/05/2000 | US6114228 Method of making a semiconductor device with a composite gate dielectric layer and gate barrier layer |
| 09/05/2000 | US6114227 Chamber for reducing contamination during chemical vapor deposition |
| 09/05/2000 | US6114226 Method of manufacturing electrostatic discharge protective circuit |
| 09/05/2000 | US6114225 Phosphorus doping selected regions of a silicon integrated circuit |
| 09/05/2000 | US6114224 System and method for using N2 O plasma treatment to eliminate defects at an interface between a stop layer and an integral layered dielectric |
| 09/05/2000 | US6114223 Gettering regions and methods of forming gettering regions within a semiconductor wafer |
| 09/05/2000 | US6114222 Method to cure mobile ion contamination in semiconductor processing |
| 09/05/2000 | US6114221 Method and apparatus for interconnecting multiple circuit chips |
| 09/05/2000 | US6114220 Method of fabricating a shallow trench isolation |
| 09/05/2000 | US6114219 Method of manufacturing an isolation region in a semiconductor device using a flowable oxide-generating material |
| 09/05/2000 | US6114218 Texturized polycrystalline silicon to aid field oxide formation |
| 09/05/2000 | US6114217 Method for forming isolation trenches on a semiconductor substrate |
| 09/05/2000 | US6114216 Methods for shallow trench isolation |
| 09/05/2000 | US6114214 Method for forming a high-density dram cell with a double-crown rugged polysilicon capacitor |
| 09/05/2000 | US6114213 Fabrication method for a capacitor having high capacitance |
| 09/05/2000 | US6114212 Methods of fabricating bipolar junction transistors having an increased safe operating area |
| 09/05/2000 | US6114211 Semiconductor device with vertical halo region and methods of manufacture |
| 09/05/2000 | US6114210 Method of forming semiconductor device comprising a drain region with a graded N-LDD junction with increased HCI lifetime |
| 09/05/2000 | US6114209 Method of fabricating semiconductor devices with raised doped region structures |
| 09/05/2000 | US6114208 Method for fabricating complementary MOS transistor |
| 09/05/2000 | US6114207 Method of producing a semiconductor device |
| 09/05/2000 | US6114206 Multiple threshold voltage transistor implemented by a damascene process |
| 09/05/2000 | US6114205 Epitaxial channel vertical MOS transistor |
| 09/05/2000 | US6114204 Method of fabricating high density flash memory with self-aligned tunneling window |
| 09/05/2000 | US6114203 Method of manufacturing a MOS integrated circuit having components with different dielectrics |
| 09/05/2000 | US6114202 Method of fabricating dynamic random access memory |
| 09/05/2000 | US6114201 Method of manufacturing a multiple fin-shaped capacitor for high density DRAMs |
| 09/05/2000 | US6114200 Fabricating a dram device to reduce the stress and enhance the adhesion between the top electrode and the interlevel dielectric layer, includes forming a titanium layer between the top electrode and the interlevel dielectric layer |
| 09/05/2000 | US6114199 Manufacturing method for ferroelectric film and nonvolatile memory using the same |
| 09/05/2000 | US6114198 In which the capacitance has been increased via use of a high dielectric constant capacitor dielectric layer |
| 09/05/2000 | US6114197 Manufacture of an integrated circuit that incorporates electrostatic discharge protection |
| 09/05/2000 | US6114196 Method of fabricating metal-oxide semiconductor transistor |
| 09/05/2000 | US6114195 Manufacturing method of compound semiconductor field effect transistor |
| 09/05/2000 | US6114194 Method for fabricating a field device transistor |
| 09/05/2000 | US6114193 Method for preventing the snap down effect in power rectifier with higher breakdown voltage |
| 09/05/2000 | US6114192 Method of manufacturing a semiconductor device having a ball grid array package structure using a supporting frame |
| 09/05/2000 | US6114191 Semiconductor packaging method |
| 09/05/2000 | US6114189 Molded array integrated circuit package |
| 09/05/2000 | US6114188 Forming a monolithic integrated self-biased circulator |
| 09/05/2000 | US6114187 Method for preparing a chip scale package and product produced by the method |
| 09/05/2000 | US6114186 Hydrogen silsesquioxane thin films for low capacitance structures in integrated circuits |
| 09/05/2000 | US6114184 Method for manufacturing LCD device capable of avoiding short circuit between signal line and pixel electrode |
| 09/05/2000 | US6114182 Measuring electron shading damage in semiconductor fabrication |
| 09/05/2000 | US6114096 Method for fabricating an electronic component which component had an asymmetric resist pattern formed on the component during the manufacturing process; manufacture of electronic components such as integrated circuit wafers using |
| 09/05/2000 | US6114093 Desired pattern is written by exposing the resist film with a charged particle electron beam |
| 09/05/2000 | US6114091 Photopolymerizable composition containing an N-heterocyclic photoinitiator |
| 09/05/2000 | US6114088 Thermal transfer element for forming multilayer devices |
| 09/05/2000 | US6114085 Antireflective composition for a deep ultraviolet photoresist |
| 09/05/2000 | US6114082 Preparing a film forming photoresist composition used in manufacture of integrated circuit chips |
| 09/05/2000 | US6114074 Extrusion enhanced mask for improving process window |
| 09/05/2000 | US6114072 Reticle which can prevent degradation in registration accuracy caused by shot rotation error or shot magnification error without increasing area of the dicing region |
| 09/05/2000 | US6114071 Photolithography mask for optically transferring a lithographic pattern corresponding to an integrated circuit from said mask onto a semiconductor substrate by use of an optical exposure tool |
| 09/05/2000 | US6114013 Sealing label for sealing semiconductor element |
| 09/05/2000 | US6113992 Laser making techniques |
| 09/05/2000 | US6113836 Method of forming thick film pattern and material for forming thick film pattern |
| 09/05/2000 | US6113761 Copper sputtering target assembly and method of making same |