Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2000
11/21/2000US6150695 Multilevel transistor formation employing a local substrate formed within a shallow trench
11/21/2000US6150693 Short channel non-self aligned VMOS field effect transistor
11/21/2000US6150692 Thin film semiconductor device for active matrix panel
11/21/2000US6150691 Spacer patterned, high dielectric constant capacitor
11/21/2000US6150690 Structure of a capacitor section of a dynamic random-access memory
11/21/2000US6150689 Semiconductor integrated circuit device and method for manufacturing the same
11/21/2000US6150688 Semiconductor device and method of manufacturing the same
11/21/2000US6150687 Memory cell having a vertical transistor with buried source/drain and dual gates
11/21/2000US6150685 Semiconductor device with filed-effect transistors of a complementary type and method of manufacturing the same
11/21/2000US6150684 Thin-film capacitor and method of producing same
11/21/2000US6150678 Method and pattern for avoiding micro-loading effect in an etching process
11/21/2000US6150671 Semiconductor device having high channel mobility and a high breakdown voltage for high power applications
11/21/2000US6150670 Process for fabricating a uniform gate oxide of a vertical transistor
11/21/2000US6150638 Thermal conditioning apparatus
11/21/2000US6150628 Toroidal low-field reactive gas source
11/21/2000US6150286 Forming thin oxide interface by concurrent annealing in ammonia and nitrous oxide
11/21/2000US6150285 Method for simultaneous deposition and sputtering of TEOS
11/21/2000US6150284 Method of forming an organic polymer insulating film in a semiconductor device
11/21/2000US6150283 Thin film transistor fabrication method, active matrix substrate fabrication method, and liquid crystal display device
11/21/2000US6150282 Selective removal of etching residues
11/21/2000US6150281 Method for manufacturing contact hole using an etching barrier layer pattern
11/21/2000US6150280 Electron-beam cell projection aperture formation method
11/21/2000US6150279 Environmentally safe surface treatment using solution containing thiourea
11/21/2000US6150278 Method of fabricating node capacitor for DRAM processes
11/21/2000US6150277 Method of making an oxide structure having a finely calibrated thickness
11/21/2000US6150276 Method for fabricating metal-oxide semiconductor transistor
11/21/2000US6150274 Method of enhancing CMP removal rate of polymer-like material and improving planarization in integrated circuit structure
11/21/2000US6150273 Method of fabricating a kink-effect-free shallow trench isolations
11/21/2000US6150272 Method for making metal plug contacts and metal lines in an insulating layer by chemical/mechanical polishing that reduces polishing-induced damage
11/21/2000US6150271 Differential temperature control in chemical mechanical polishing processes
11/21/2000US6150270 Method for forming barrier layer for copper metallization
11/21/2000US6150269 Copper interconnect patterning
11/21/2000US6150268 Barrier materials for metal interconnect
11/21/2000US6150267 Method of manufacturing buried contact in SRAM
11/21/2000US6150266 Local interconnect formed using silicon spacer
11/21/2000US6150265 Apparatus for forming materials
11/21/2000US6150264 Method of manufacturing self-aligned silicide
11/21/2000US6150263 Method of fabricating small dimension wires
11/21/2000US6150261 Method of fabricating semiconductor device for preventing antenna effect
11/21/2000US6150260 Sacrificial stop layer and endpoint for metal CMP
11/21/2000US6150259 Method for forming a metal plug
11/21/2000US6150258 Flowing acetylene, silane and fluorocarbon gases; depositing adhesion layer
11/21/2000US6150257 Plasma treatment of an interconnect surface during formation of an interlayer dielectric
11/21/2000US6150256 Method for forming self-aligned features
11/21/2000US6150255 Method of planarizing a curved substrate and resulting structure
11/21/2000US6150254 Method for wiring of a semiconductor device
11/21/2000US6150252 Multi-stage semiconductor cavity filling process
11/21/2000US6150251 Sandwiching polysilicon between amorphous layers; patterning, doping
11/21/2000US6150250 Laminating tungsten silicide; forming titanium nitride or oxynitride antireflection layer; photolithography
11/21/2000US6150249 Siliciding, alloying, anneling
11/21/2000US6150248 Method for fabricating semiconductor device
11/21/2000US6150247 Method for making polycide-to-polycide low contact resistance contacts for interconnections on integrated circuits
11/21/2000US6150246 Doping, annealing; heat resistant
11/21/2000US6150245 Method of manufacturing a field effect transistor
11/21/2000US6150244 Method for fabricating MOS transistor having raised source and drain
11/21/2000US6150243 Shallow junction formation by out-diffusion from a doped dielectric layer through a salicide layer
11/21/2000US6150242 Method of growing crystalline silicon overlayers on thin amorphous silicon oxide layers and forming by method a resonant tunneling diode
11/21/2000US6150241 Method for producing a transistor with self-aligned contacts and field insulation
11/21/2000US6150240 Method and apparatus for singulating semiconductor devices
11/21/2000US6150239 Method for the transfer of thin layers monocrystalline material onto a desirable substrate
11/21/2000US6150238 Method for fabricating a trench isolation
11/21/2000US6150237 Method of fabricating STI
11/21/2000US6150235 Method of forming shallow trench isolation structures
11/21/2000US6150234 Lengthening oxidation time with inert gas during thermal anneal; adding chlorine source to minimize facets
11/21/2000US6150233 Semiconductor device and method of manufacturing the same
11/21/2000US6150232 Formation of low k dielectric
11/21/2000US6150231 Overlay measurement technique using moire patterns
11/21/2000US6150230 Trench separator for self-defining discontinuous film
11/21/2000US6150228 Method of manufacturing an SRAM with increased resistance length
11/21/2000US6150227 Integrated circuit structure with a gap between resistor film and substrate
11/21/2000US6150226 Nitrogen exposure
11/21/2000US6150225 Method for fabricating a semiconductor device having vertical and lateral type bipolar transistors
11/21/2000US6150224 Method of manufacturing a semiconductor device with a bipolar transistor
11/21/2000US6150223 Method for forming gate spacers with different widths
11/21/2000US6150222 Method of making a high performance transistor with elevated spacer formation and self-aligned channel regions
11/21/2000US6150221 Semiconductor device and method for manufacturing same
11/21/2000US6150220 Insulation layer structure and method for making the same
11/21/2000US6150218 Method for simutaneously forming bit-line contacts and node contacts
11/21/2000US6150217 Method of fabricating a DRAM capacitor
11/21/2000US6150216 Method for forming an electrode of semiconductor device capacitor
11/21/2000US6150215 Avoiding abnormal capacitor formation by an offline edge-bead rinsing (EBR)
11/21/2000US6150214 Titanium nitride metal interconnection system and method of forming the same
11/21/2000US6150213 Method of forming a cob dram by using self-aligned node and bit line contact plug
11/21/2000US6150212 Shallow trench isolation method utilizing combination of spacer and fill
11/21/2000US6150211 Methods of forming storage capacitors in integrated circuitry memory cells and integrated circuitry
11/21/2000US6150210 Memory cell that includes a vertical transistor and a trench capacitor
11/21/2000US6150209 Leakage current reduction of a tantalum oxide layer via a nitrous oxide high density annealing procedure
11/21/2000US6150208 DRAM capacitors made from silicon-germanium and electrode-limited conduction dielectric films
11/21/2000US6150207 Method for fabricating a crown capacitor with rough surface
11/21/2000US6150206 Methods of forming integrated circuit capacitors using trench isolation and planarization techniques
11/21/2000US6150205 Method of fabricating dual gate
11/21/2000US6150204 Semiconductor processing method of fabricating field effect transistors
11/21/2000US6150203 Method for manufacturing a semiconductor device
11/21/2000US6150202 Method for fabricating semiconductor device
11/21/2000US6150201 Methods of forming top-gated thin film field effect transistors
11/21/2000US6150199 Method for fabrication of programmable interconnect structure
11/21/2000US6150198 Method of fabricating semiconductor read-only memory device with reduced parastic capacitance between bit line and word line
11/21/2000US6150197 Method of fabricating heterolithic microwave integrated circuits
11/21/2000US6150193 RF shielded device
11/21/2000US6150192 Apparatus and method for snap-on thermo-compression bonding
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