Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2000
11/22/2000EP1054443A2 Wafer etching method
11/22/2000EP1054442A2 Method for growing epitaxial group III nitride compound semiconductors on silicon
11/22/2000EP1054441A2 Composite iridium-metal-oxygen barrier structure with refractory metal companion barrier and method for its fabrication
11/22/2000EP1054440A2 Composite iridium barrier structure with oxidized refractory metal companion barrier and method for its fabrication
11/22/2000EP1054439A1 Gripper for supporting substrate in a vertical orientation
11/22/2000EP1054438A2 System and method for cleaning silicon-coated surfaces in an ion implanter
11/22/2000EP1054437A2 Method and apparatus for attaching wafer to wafer frame and planarization apparatus including attaching apparatus
11/22/2000EP1054436A2 Device for etching a single side of a wafer
11/22/2000EP1054433A1 Plasma doping system and plasma doping method
11/22/2000EP1054406A2 Ferroelectric non-volatile memory device
11/22/2000EP1054311A1 Gas delivery metering tube
11/22/2000EP1054082A1 P-type group II-VI compound semiconductor crystals, growth method for such crystals, and semiconductor device made of such crystals
11/22/2000EP1054081A2 Composition and process for treating a surface coated with a self-accelerating and replenishing non-formaldehyde immersion coating
11/22/2000EP1054080A2 Electrolytic copper plating solutions
11/22/2000EP1054076A2 Gas distribution system
11/22/2000EP1053985A1 Resist compositions and patterning process
11/22/2000EP1053979A1 Synthetic quartz glass substrate for photomask and method of its production
11/22/2000EP1053831A1 Sandblasting agent, wafer treated with the same, and method of treatment with the same
11/22/2000EP1053830A2 System for dispensing polishing liquid during chemical mechanical polishing of a semiconductor wafer
11/22/2000EP1053627A1 Bidding for telecommunications traffic over route segments
11/22/2000EP1053567A1 Lateral thin-film silicon-on-insulator (soi) jfet device
11/22/2000EP1053566A1 Method and composition for dry photoresist stripping in semiconductor fabrication
11/22/2000EP1053565A1 Method of forming an assembly of stacked layers
11/22/2000EP1053563A1 Methods for reducing mask erosion during plasma etching
11/22/2000EP1053562A1 Focused particle beam systems and methods using a tilt column
11/22/2000EP1053518A1 Protection circuit for an integrated circuit
11/22/2000EP1053510A1 Process for producing a photoresist composition having a reduced tendency to produce particles
11/22/2000EP1053508A1 A process for making a photoactive compound and photoresist therefrom
11/22/2000EP1053442A1 Wafer carrier and semiconductor apparatus for processing a semiconductor substrate
11/22/2000EP0963586A4 A scalable flash eeprom memory cell, method of manufacturing and operation thereof
11/22/2000CN1274474A Chip scale ball grid array for integrated circuit package
11/22/2000CN1274425A Burn-in board with adaptable heat sink device
11/22/2000CN1274395A Dual frequency excitation of plasma for film deposition
11/22/2000CN1274176A Slot type capacitor with insulating ring and its mfg. method
11/22/2000CN1274175A Reference input first class circuit of semiconductor integrated circuit
11/22/2000CN1274173A Method of mfg. carrying band and carrying band type semiconductor device
11/22/2000CN1274171A Correction for metal inlaid wiring form
11/22/2000CN1274170A Improvement in top layer photoetching imaging of semiconductor tech.
11/22/2000CN1274021A Electrolytic copper electroplating liquid
11/22/2000CN1058809C Method for producing CMOS transistor
11/22/2000CN1058808C Method for mfg. separation film of semiconductor device
11/22/2000CN1058807C Method of forming tungsten plug in semiconductor device
11/22/2000CN1058761C Heat treating appts. for mercury-cadmium tellurid
11/21/2000USRE36964 Device manufacture involving lithographic processing
11/21/2000US6151695 Test method of chips in a semiconductor wafer employing a test algorithm
11/21/2000US6151694 Method of evaluating fault coverage
11/21/2000US6151561 Method of estimating lifetime of floating SOI-MOSFET
11/21/2000US6151533 Collation method of stocker storage in semiconductor wafer cassette transportation apparatus
11/21/2000US6151447 Rapid thermal processing apparatus for processing semiconductor wafers
11/21/2000US6151446 Apparatus and method for thermally processing substrates including a processor using multiple detection signals
11/21/2000US6151351 Distributed feedback semiconductor laser and method for producing the same
11/21/2000US6151254 Non-volatile semiconductor memory device and data erase method of non-volatile semiconductor memory device
11/21/2000US6151252 Nonvolatile semiconductor memory device
11/21/2000US6151249 NAND-type EEPROM having bit lines and source lines commonly coupled through enhancement and depletion transistors
11/21/2000US6151245 Screened EEPROM cell
11/21/2000US6151244 Dynamic semiconductor memory device
11/21/2000US6151243 Ferroelectric memory device having folded bit line architecture
11/21/2000US6151242 Semiconductor memory device
11/21/2000US6151241 Ferroelectric memory with disturb protection
11/21/2000US6151240 Ferroelectric nonvolatile memory and oxide multi-layered structure
11/21/2000US6151203 Connectors for an electrostatic chuck and combination thereof
11/21/2000US6151199 Semiconductor integrated circuit device
11/21/2000US6151121 Position detecting system and device manufacturing method using the same
11/21/2000US6151120 Exposure apparatus and method
11/21/2000US6151119 Apparatus and method for determining depth profile characteristics of a dopant material in a semiconductor device
11/21/2000US6151105 Exposure apparatus having dynamically isolated support structure
11/21/2000US6151103 Method and system for improved optical imaging in microlithography
11/21/2000US6151101 Charged-particle-beam projection-exposure apparatus and methods exhibiting increased throughtput
11/21/2000US6151042 Ink jet printhead with layer of cured polymer made from polymer having photosensitive substituent which enables crosslinking or chain extension via actinic radiation, and a second, thermosensitive substituent for further crosslinking
11/21/2000US6150878 Low voltage device operable with a high voltage supply
11/21/2000US6150877 Semiconductor device with improved circuit interconnection
11/21/2000US6150870 Adjustable substrate voltage applying circuit of a semiconductor device
11/21/2000US6150832 Noncontact capacitance measuring device
11/21/2000US6150830 Test head for microstructures with interface
11/21/2000US6150828 Method and apparatus for automatically positioning electronic dice with component packages
11/21/2000US6150805 Self-canceling start-up pulse generator
11/21/2000US6150787 Exposure apparatus having dynamically isolated reaction frame
11/21/2000US6150762 Method of manufacturing cathode for plasma etching apparatus using chemical surface treatment with potassium hydroxide (KOH), and cathode manufactured thereby
11/21/2000US6150728 Semiconductor memory device having a pad arrangement with reduced occupying area
11/21/2000US6150727 Semiconductor device
11/21/2000US6150726 Component carrier with raised bonding sites
11/21/2000US6150725 Semiconductor devices with means to reduce contamination
11/21/2000US6150723 Copper stud structure with refractory metal liner
11/21/2000US6150722 Ldmos transistor with thick copper interconnect
11/21/2000US6150721 Integrated circuit which uses a damascene process for producing staggered interconnect lines
11/21/2000US6150720 Semiconductor device having manufacturing wiring structure with buried plugs
11/21/2000US6150718 Method and apparatus for performing a circuit edit through the back side of an integrated circuit die
11/21/2000US6150717 Direct die contact (DDC) semiconductor package
11/21/2000US6150716 Metal substrate having an IC chip and carrier mounting
11/21/2000US6150713 Metal substrate; intermediate layer on at least one side of substrate; and a protection layer plated with one or more of palladium, gold, silver, or alloys thereof formed on upper surface of intermediate layer by applying modulating current
11/21/2000US6150711 Ferroalloy substrate, first precious metal(pm) plating layer, intermediate layer of copper (alloy) plating layer and a nickel (alloy) plating layer, and a second pm plating layer formed sequentially on substrate; anticorrosion, solderable
11/21/2000US6150708 Advanced CMOS circuitry that utilizes both sides of a wafer surface for increased circuit density
11/21/2000US6150707 Metal-to-metal capacitor having thin insulator
11/21/2000US6150706 Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer
11/21/2000US6150701 Insulative guard ring for a semiconductor device
11/21/2000US6150700 Advanced nor-type mask ROM
11/21/2000US6150699 Tri-voltage Bi-CMOS semiconductor device
11/21/2000US6150698 Semiconductor device and method of forming semiconductor device having non-uniformly doped well
11/21/2000US6150697 Semiconductor apparatus having high withstand voltage
11/21/2000US6150696 Semiconductor substrate and method of fabricating semiconductor device