Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2001
01/02/2001US6169026 Method for planarization of semiconductor device including pumping out dopants from planarization layer separately from flowing said layer
01/02/2001US6169025 Method of fabricating self-align-contact
01/02/2001US6169024 Process to manufacture continuous metal interconnects
01/02/2001US6169023 Method for making semiconductor device
01/02/2001US6169022 Method of forming projection electrodes
01/02/2001US6169021 Method of making a metallized recess in a substrate
01/02/2001US6169020 Methods of fabricating integrated circuits including metal silicide contacts extending between a gate electrode and a source/drain region
01/02/2001US6169019 Semiconductor apparatus and manufacturing method therefor
01/02/2001US6169018 Fabrication method for semiconductor device
01/02/2001US6169017 Method to increase contact area
01/02/2001US6169016 Method of forming contact
01/02/2001US6169014 Laser crystallization of thin films
01/02/2001US6169013 Method of optimizing crystal grain size in polycrystalline silicon films
01/02/2001US6169012 Chemical mechanical polishing for forming a shallow trench isolation structure
01/02/2001US6169011 Trench isolation structure and method for same
01/02/2001US6169010 Method for making integrated circuit capacitor including anchored plug
01/02/2001US6169009 Dry etching the platinum group electroconductive film using a predetermined etching gas, wherein the etching gas is a gas mixture containing argon, oxygen and halogen
01/02/2001US6169008 High Q inductor and its forming method
01/02/2001US6169007 Self-aligned non-selective thin-epi-base silicon germanium (SiGe) heterojunction bipolar transistor BicMOS process using silicon dioxide etchback
01/02/2001US6169006 Semiconductor device having grown oxide spacers and method of manufacture thereof
01/02/2001US6169005 Formation of junctions by diffusion from a doped amorphous silicon film during silicidation
01/02/2001US6169004 Production method for a semiconductor device
01/02/2001US6169003 Method for forming a MOS device with an elevated source and drain, and having a self-aligned channel input
01/02/2001US6169002 Methods of forming trench isolation structures by etching back electrically insulating layers using etching masks
01/02/2001US6169000 Process for the production of semiconductor substrate having silicon-on-insulating structure and process for the production of semiconductor device
01/02/2001US6168999 Method for fabricating high-performance submicron mosfet with lateral asymmetric channel and a lightly doped drain
01/02/2001US6168998 Dual gate MOSFET fabrication method
01/02/2001US6168997 Method of forming poly gate and polycide gate with equal height
01/02/2001US6168996 Method of fabricating semiconductor device
01/02/2001US6168995 Method of fabricating a split gate memory cell
01/02/2001US6168994 Method of making memory device with an element splitting trench
01/02/2001US6168993 Process for fabricating a semiconductor device having a graded junction
01/02/2001US6168992 Methods for forming electrodes including sacrificial layers
01/02/2001US6168991 DRAM capacitor including Cu plug and Ta barrier and method of forming
01/02/2001US6168990 Method for fabricating Dram cell capacitor
01/02/2001US6168989 Process for making new and improved crown-shaped capacitors on dynamic random access memory cells
01/02/2001US6168988 Method for producing barrier-free semiconductor memory configurations
01/02/2001US6168987 Method for fabricating crown-shaped capacitor structures
01/02/2001US6168986 Method of making a sacrificial self-aligned interconnect structure
01/02/2001US6168985 Semiconductor integrated circuit device including a DRAM having reduced parasitic bit line capacity and method of manufacturing same
01/02/2001US6168984 Reduction of the aspect ratio of deep contact holes for embedded DRAM devices
01/02/2001US6168983 Method of making a high-voltage transistor with multiple lateral conduction layers
01/02/2001US6168982 Manufacture of electronic devices comprising thin-film circuit elements
01/02/2001US6168981 Method and apparatus for the localized reduction of the lifetime of charge carriers, particularly in integrated electronic devices
01/02/2001US6168980 Semiconductor device and method for forming the same
01/02/2001US6168979 Method for fabricating semiconductor device
01/02/2001US6168978 Method for producing a power semiconductor component on a two-sided substrate that blocks on both sides of the substrate
01/02/2001US6168977 Method of manufacturing a semiconductor device having conductive patterns
01/02/2001US6168976 Socketable BGA package
01/02/2001US6168974 Process of mounting spring contacts to semiconductor devices
01/02/2001US6168972 Flip chip pre-assembly underfill process
01/02/2001US6168970 Ultra high density integrated circuit packages
01/02/2001US6168969 Surface mount IC using silicon vias in an area array format or same size as die array
01/02/2001US6168963 System for adhering parts
01/02/2001US6168962 Method of manufacturing a semiconductor light emitting device
01/02/2001US6168961 Process for the preparation of epitaxial wafers for resistivity measurements
01/02/2001US6168959 Method of forming a ferroelectric memory device
01/02/2001US6168958 Depositing a high permittivity layer of first thickness on the substrate, a first set of gate electrodes are formed,selected portion of permittivity layer are then removed, thus reducing permittivity layer to second thicknessthickness, forming gate
01/02/2001US6168909 Material and method for forming pattern
01/02/2001US6168907 Method for etching semiconductor device
01/02/2001US6168900 Mixture of tert-butoxycarbonyl protected polyhydroxystyrene polymers having different molecular weight are used as a basic polymer of chemically amplified resist together with photoacid generator; excellent in resolution and focusing
01/02/2001US6168898 Positive acting photodielectric composition
01/02/2001US6168891 Correcting mask patterns for semiconductor integrated circuits comprising a sorting step of sorting patterns units composing a mask pattern based on their respective shape/and or positional relationship and a correction step
01/02/2001US6168890 For forming a microlithographic mask having a thin membrane
01/02/2001US6168726 Etching an oxidized organo-silane film
01/02/2001US6168704 Site-selective electrochemical deposition of copper
01/02/2001US6168697 Holders suitable to hold articles during processing and article processing methods
01/02/2001US6168695 Lift and rotate assembly for use in a workpiece processing station and a method of attaching the same
01/02/2001US6168684 Wafer polishing apparatus and polishing method
01/02/2001US6168683 Apparatus and method for the face-up surface treatment of wafers
01/02/2001US6168678 Method and device for stacking substrates which are to be joined by bonding
01/02/2001US6168672 Method and apparatus for automatically performing cleaning processes in a semiconductor wafer processing system
01/02/2001US6168669 Substrate holding apparatus and substrate process system
01/02/2001US6168668 Shadow ring and guide for supporting the shadow ring in a chamber
01/02/2001US6168667 Resist-processing apparatus
01/02/2001US6168665 Substrate processing apparatus
01/02/2001US6168659 Forming an amorphous silicon dioxide thin film on a silicon substrate, forming a single crystal silicon thin film on said silicon dioxide thin film and then forming gallium nitride directly on said silicon thin film.
01/02/2001US6168638 Touchless stabilizer for processing spherical shaped devices
01/02/2001US6168637 Use of a large angle implant and current structure for eliminating a critical mask in flash memory processing
01/02/2001US6168504 Polishing chucks, semiconductor wafer polishing chucks, abrading methods, polishing methods, semiconductor wafer polishing methods, and methods of forming polishing chucks
01/02/2001US6168500 Monitoring system for dicing saws
01/02/2001US6168499 Grinding apparatus for semiconductor wafers
01/02/2001US6168427 Apparatus for guiding the removal of a processing tube from a semiconductor furnace
01/02/2001US6168364 Vacuum clean box, clean transfer method and apparatus therefor
01/02/2001US6168310 Device for measuring physical quantity using pulsed laser interferometry
01/02/2001US6168296 Lighting unit for reading marks
01/02/2001US6168169 Vacuum collet with release filament
01/02/2001US6168063 Ultrasonic vibration bonding machine
01/02/2001US6168048 Methods and systems for distributing liquid chemicals
01/02/2001US6168025 Wafer holding structure for semiconductor wafer containers
01/02/2001US6168003 Method and apparatus for the linear positioning and for the position recognition of a substrate on an onserting unit
01/02/2001US6167893 Dynamic chuck for semiconductor wafer or other substrate
01/02/2001US6167891 Temperature controlled degassification of deionized water for megasonic cleaning of semiconductor wafers
01/02/2001US6167837 Apparatus and method for plasma enhanced chemical vapor deposition (PECVD) in a single wafer reactor
01/02/2001US6167836 Plasma-enhanced chemical vapor deposition apparatus
01/02/2001US6167835 Two chamber plasma processing apparatus
01/02/2001US6167834 Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process
01/02/2001US6167583 Double side cleaning apparatus for semiconductor substrate
01/02/2001CA2172233C Slant-surface silicon wafer having a reconstructed atomic-level stepped surface structure
01/02/2001CA2088605C Formation of microstructures by multiple level deep x-ray lithography with sacrificial metal layers