Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2001
02/28/2001CN1285628A Electric connector and method of making same
02/28/2001CN1285620A Semiconductor device
02/28/2001CN1285618A Improved technology for buried stripe self oriented to deep storage channel
02/28/2001CN1285617A Method for making ferroelectric film, ferroelectric capacitor, ferroelectric memory and making method thereof
02/28/2001CN1285616A Technology for making capacitor buried chip in channel dynamic RAM
02/28/2001CN1285615A Probe card for testing semiconductor chip with many semiconductor device and method thereof
02/28/2001CN1285614A Method for preparation of printed IC board
02/28/2001CN1285613A Electronic element without lead pin and method for making the same
02/28/2001CN1285612A Electronic Beam exposure mask, Exposure method and equipment and method for making semiconductor device
02/28/2001CN1285611A Semiconductor device and making method thereof
02/28/2001CN1285537A CPU heat-sink for personal computer
02/28/2001CN1285526A Electro-optical device
02/28/2001CN1285509A Method and apparatus for detecting micro-scrape
02/28/2001CN1285423A Laser device and laser annealing method
02/28/2001CN1285384A Process for preparation of metal oxide slurry adaptable to chemical-mechanical polishing of semiconductor
02/28/2001CN1285261A Abrading tool
02/28/2001CN1285253A Electric arc type ion plating device
02/28/2001CN1062680C Method for making semiconductor device
02/28/2001CN1062679C Method for forming element isolating film of semiconductor device
02/27/2001US6195790 Electrical parameter evaluation system, electrical parameter evaluation method, and computer-readable recording medium for recording electrical parameter evaluation program
02/27/2001US6195787 Layout designing method for semiconductor integrated circuits
02/27/2001US6195786 Constrained register sharing technique for low power VLSI design
02/27/2001US6195621 Non-invasive system and method for diagnosing potential malfunctions of semiconductor equipment components
02/27/2001US6195619 System for aligning rectangular wafers
02/27/2001US6195593 Reusable modules for complex integrated circuit devices
02/27/2001US6195306 Semiconductor device
02/27/2001US6195305 Semiconductor integrated circuit device
02/27/2001US6195299 Semiconductor memory device having an address exchanging circuit
02/27/2001US6195298 Semiconductor integrated circuit capable of rapidly rewriting data into memory cells
02/27/2001US6195292 Semiconductor memory with floating gate type FET
02/27/2001US6195264 Laminate substrate having joining layer of photoimageable material
02/27/2001US6195263 Electronic control unit
02/27/2001US6195258 Thermal board used for bonding wires in semiconductor manufacturing process
02/27/2001US6195246 Electrostatic chuck having replaceable dielectric cover
02/27/2001US6195228 Thin, horizontal-plane hall sensors for read-heads in magnetic recording
02/27/2001US6195202 Laser microscope and a pattern inspection apparatus using such laser microscope
02/27/2001US6195201 Reflective fly's eye condenser for EUV lithography
02/27/2001US6195154 Projection exposure apparatus for transferring mask pattern onto photosensitive substrate
02/27/2001US6195153 Scanning type exposure device having individually adjustable optical modules and method of manufacturing same
02/27/2001US6195139 Electro-optical device
02/27/2001US6194987 Inductance device
02/27/2001US6194961 Microstructure including a circuit integrated in a substrate on one surface of which is arranged a flat coil
02/27/2001US6194952 Transmission gate circuit
02/27/2001US6194948 Method and an auxiliary circuit for preventing the triggering of a parasitic transistor in an output stage of an electronic circuit
02/27/2001US6194907 Prober and electric evaluation method of semiconductor device
02/27/2001US6194788 Flip chip with integrated flux and underfill
02/27/2001US6194786 Integrated circuit package providing bond wire clearance over intervening conductive regions
02/27/2001US6194784 Self-aligned contact process in semiconductor fabrication and device therefrom
02/27/2001US6194783 Hillock-free aluminum-containing film consisting of aluminum having trace oxygen content formed by placing substrate in vacuum deposition chamber including aluminum-containing target, evacuating, applying electricity, introducing hydrogen
02/27/2001US6194781 Semiconductor device and method of fabricating the same
02/27/2001US6194780 Tape automated bonding method and bonded structure
02/27/2001US6194779 Plastic mold type semiconductor device
02/27/2001US6194776 Semiconductor circuit device having triple-well structure in semiconductor substrate, method of fabricating the same, and mask device for fabrication of the same
02/27/2001US6194775 Semiconductor element with thermally nitrided film on high resistance film and method of manufacturing the same
02/27/2001US6194773 Vertical transistor having top and bottom surface isolation
02/27/2001US6194772 High-voltage semiconductor device with trench structure
02/27/2001US6194768 High dielectric constant gate dielectric with an overlying tantalum gate conductor formed on a sidewall surface of a sacrificial structure
02/27/2001US6194767 X-ROM semiconductor memory device
02/27/2001US6194766 Integrated circuit having low voltage and high voltage devices on a common semiconductor substrate
02/27/2001US6194765 Integrated electrical circuit having at least one memory cell and method for fabricating it
02/27/2001US6194764 Integrated semiconductor circuit with protection structure for protecting against electrostatic discharge
02/27/2001US6194763 Semiconductor device having SOI-MOSFET
02/27/2001US6194762 Complementary metal oxide semiconductor (CMOS) device comprising thin-film transistors arranged on a glass substrate
02/27/2001US6194761 VDMOS transistor protected against over-voltages between source and gate
02/27/2001US6194760 Double-diffused MOS transistor and method of fabricating the same
02/27/2001US6194759 Semiconductor memory device
02/27/2001US6194758 Semiconductor device comprising capacitor and method of fabricating the same
02/27/2001US6194757 Semiconductor device having contact hole and method of manufacturing the same
02/27/2001US6194756 Structure for isolating a junction from an adjacent isolation structure
02/27/2001US6194755 Low-resistance salicide fill for trench capacitors
02/27/2001US6194754 Amorphous barrier layer in a ferroelectric memory cell
02/27/2001US6194753 Method of forming a perovskite structure semiconductor capacitor
02/27/2001US6194752 Dielectric device, dielectric memory and method of fabricating the same
02/27/2001US6194751 Ferroelectric based memory devices utilizing low Curie point ferroelectrics and encapsulation
02/27/2001US6194748 MOSFET with suppressed gate-edge fringing field effect
02/27/2001US6194747 Field effect transistor
02/27/2001US6194746 Vertical diode structures with low series resistance
02/27/2001US6194744 Method of growing group III nitride semiconductor crystal layer and semiconductor device incorporating group III nitride semiconductor crystal layer
02/27/2001US6194742 Strain engineered and impurity controlled III-V nitride semiconductor films and optoelectronic devices
02/27/2001US6194741 MOSgated trench type power semiconductor with silicon carbide substrate and increased gate breakdown voltage and reduced on-resistance
02/27/2001US6194736 Quantum conductive recrystallization barrier layers
02/27/2001US6194734 Method and system for operating a variable aperture in an ion implanter
02/27/2001US6194732 Charged-particle-beam exposure methods with beam parallelism detection and correction
02/27/2001US6194691 Heating furnace and manufacturing method therefor
02/27/2001US6194680 Microwave plasma processing method
02/27/2001US6194668 Multi-layer circuit board
02/27/2001US6194628 Method and apparatus for cleaning a vacuum line in a CVD system
02/27/2001US6194482 Casting resin of epoxy resin, isocyanurate siloxane, fillers, photo initiators and thermal initiators
02/27/2001US6194365 Composition for cleaning and etching electronic display and substrate
02/27/2001US6194328 H2 diffusion barrier formation by nitrogen incorporation in oxide layer
02/27/2001US6194327 Using hydrogen gas and fluorine gas to etch an oxide in a rapid thermal process, wherein said fluorine gas and said hydrogen gas are in a non-plasma state
02/27/2001US6194326 Low temperature rinse of etching agents
02/27/2001US6194325 Plasma etching oxide layer over nitride layer exhibiting selectivity to nitride layer, comprising contacting oxide layer with mixture of gases comprising fluorine-substituted hydrocarbon etching gases, hydrogen gases
02/27/2001US6194324 Method for in-situ removing photoresist material
02/27/2001US6194323 Deep sub-micron metal etch with in-situ hard mask etch
02/27/2001US6194322 Electrode for plasma processes and method for a manufacture and use thereof
02/27/2001US6194321 Semiconductor processing methods utilizing boron and nitrogen, and semiconductor wafers comprising boron and nitrogen
02/27/2001US6194320 Method for preparing a semiconductor device
02/27/2001US6194319 Semiconductor processing method of reducing an etch rate of one portion of a doped material relative to another portion, and methods of forming openings
02/27/2001US6194318 Manufacturing multiple layered structures of large scale integrated semiconductor devices