| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
|---|
| 03/20/2001 | US6204512 Provided with a p-electrode that allows observation of the light emitted from the device from a side of the substrate and an n-electrode that establishes an ohmic contact with an n-type gallium nitride-based compound semiconductor layer |
| 03/20/2001 | US6204511 Electron beam image picturing method and image picturing device |
| 03/20/2001 | US6204509 Projection-microlithography apparatus, masks, and related methods incorporating reticle-distortion measurement and correction |
| 03/20/2001 | US6204508 Toroidal filament for plasma generation |
| 03/20/2001 | US6204489 Electrically heated substrate with multiple ceramic parts each having different volume restivities |
| 03/20/2001 | US6204488 Sealing terminal |
| 03/20/2001 | US6204486 Heater unit for semiconductor processing |
| 03/20/2001 | US6204484 System for measuring the temperature of a semiconductor wafer during thermal processing |
| 03/20/2001 | US6204402 Organometallic compound |
| 03/20/2001 | US6204206 Silicon nitride deposition method |
| 03/20/2001 | US6204205 Using H2anneal to improve the electrical characteristics of gate oxide |
| 03/20/2001 | US6204204 Method and apparatus for depositing tantalum-based thin films with organmetallic precursor |
| 03/20/2001 | US6204203 Post deposition treatment of dielectric films for interface control |
| 03/20/2001 | US6204202 Low dielectric constant porous films |
| 03/20/2001 | US6204201 Method of processing films prior to chemical vapor deposition using electron beam processing |
| 03/20/2001 | US6204200 Process scheme to form controlled airgaps between interconnect lines to reduce capacitance |
| 03/20/2001 | US6204199 Method for producing a semiconductor device |
| 03/20/2001 | US6204198 Rapid thermal annealing of doped polycrystalline silicon structures formed in a single-wafer cluster tool |
| 03/20/2001 | US6204197 Semiconductor device, manufacturing method, and system |
| 03/20/2001 | US6204196 Forming base layer having surface tension and requires thermal budget to reflow; forming surface layer directly upon base layer by implanting top portion of base layer with dopant to form composite film; applying thermal energy; reflowing |
| 03/20/2001 | US6204195 Method to prevent CMP overpolish |
| 03/20/2001 | US6204194 Method and apparatus for producing a semiconductor device |
| 03/20/2001 | US6204193 Method for etching |
| 03/20/2001 | US6204192 Plasma cleaning process for openings formed in at least one low dielectric constant insulation layer over copper metallization in integrated circuit structures |
| 03/20/2001 | US6204191 Method of manufacturing semiconductor devices and semiconductor device capacitor manufactured thereby |
| 03/20/2001 | US6204190 Method for producing an electronic device |
| 03/20/2001 | US6204189 Fabrication of precision high quality facets on molecular beam epitaxy material |
| 03/20/2001 | US6204188 Heat treatment method for a silicon wafer and a silicon wafer heat-treated by the method |
| 03/20/2001 | US6204187 Contact and deep trench patterning |
| 03/20/2001 | US6204186 Method of making integrated circuit capacitor including tapered plug |
| 03/20/2001 | US6204185 Method for forming self-align stop layer for borderless contact process |
| 03/20/2001 | US6204184 Method of manufacturing semiconductor devices |
| 03/20/2001 | US6204179 Copper diffusion barrier, aluminum wetting layer and improved methods for filling openings in silicon substrates with copper |
| 03/20/2001 | US6204178 Depositing platinum metal onto substrate in chemical vapor deposition chamber at predetermined temperature and pressure; irradiating chamber interior with ultraviolet light; annealing substrate having deposited platinum inpresence of oxygen |
| 03/20/2001 | US6204177 Introducing alloy at cobalt grain boundaries within cobalt layer that overlays silicon layer, alloy selected from zinc, magnesium, tellurium, gallium and germanium; annealing cobalt and silicon layer to form silicide regions |
| 03/20/2001 | US6204176 Substituted phenylethylene precursor deposition method |
| 03/20/2001 | US6204175 Method of depositing a smooth conformal aluminum film on a refractory metal nitride layer |
| 03/20/2001 | US6204174 Method for high rate deposition of tungsten |
| 03/20/2001 | US6204173 Multiple implantation and grain growth method |
| 03/20/2001 | US6204172 Low temperature deposition of barrier layers |
| 03/20/2001 | US6204171 Providing surface layer on semiconductor substrate; sputtering layer of diffusion barrier material on surface layer in environment comprising a production gaseous nitrogen content; growing grains of nitride of diffusion barrier |
| 03/20/2001 | US6204170 Method for manufacturing semiconductor device having metal silicide film and metal film in which metal film can be selectively removed |
| 03/20/2001 | US6204169 Processing for polishing dissimilar conductive layers in a semiconductor device |
| 03/20/2001 | US6204168 Damascene structure fabricated using a layer of silicon-based photoresist material |
| 03/20/2001 | US6204167 Method of making a multi-level interconnect having a refractory metal wire and a degassed oxidized, TiN barrier layer |
| 03/20/2001 | US6204166 Method for forming dual damascene structures |
| 03/20/2001 | US6204165 Practical air dielectric interconnections by post-processing standard CMOS wafers |
| 03/20/2001 | US6204164 Method of making electrical connections to integrated circuit |
| 03/20/2001 | US6204163 Integrated circuit package for flip chip with alignment preform feature and method of forming same |
| 03/20/2001 | US6204162 Production of semiconductor device |
| 03/20/2001 | US6204161 Self aligned contact pad in a semiconductor device and method for forming the same |
| 03/20/2001 | US6204160 Method for making electrical contacts and junctions in silicon carbide |
| 03/20/2001 | US6204159 Method of forming select gate to improve reliability and performance for NAND type flash memory devices |
| 03/20/2001 | US6204158 Reduced diffusion of a mobile specie from a metal oxide ceramic into the substrate |
| 03/20/2001 | US6204157 Method for establishing shallow junction in semiconductor device to minimize junction capacitance |
| 03/20/2001 | US6204156 Method to fabricate an intrinsic polycrystalline silicon film |
| 03/20/2001 | US6204155 Semiconductor device and production thereof |
| 03/20/2001 | US6204154 Semiconductor device and fabrication method thereof |
| 03/20/2001 | US6204153 Argon doped epitaxial layers for inhibiting punchthrough within a semiconductor device |
| 03/20/2001 | US6204152 Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor |
| 03/20/2001 | US6204151 Smoothing method for cleaved films made using thermal treatment |
| 03/20/2001 | US6204150 Semiconductor device and method of manufacturing semiconductor device wherein field oxide is protected from overetching |
| 03/20/2001 | US6204149 Methods of forming polished material and methods of forming isolation regions |
| 03/20/2001 | US6204148 Method of making a semiconductor device having a grown polysilicon layer |
| 03/20/2001 | US6204147 Method of manufacturing shallow trench isolation |
| 03/20/2001 | US6204146 Method of fabricating shallow trench isolation |
| 03/20/2001 | US6204145 Silicon-on-insulator islands and method for their formation |
| 03/20/2001 | US6204144 Method for forming a metal capacitor with two metal electrodes |
| 03/20/2001 | US6204143 Method of forming high aspect ratio structures for semiconductor devices |
| 03/20/2001 | US6204142 Methods to form electronic devices |
| 03/20/2001 | US6204141 Method of manufacturing a deep trench capacitor |
| 03/20/2001 | US6204140 Dynamic random access memory |
| 03/20/2001 | US6204137 Method to form transistors and local interconnects using a silicon nitride dummy gate technique |
| 03/20/2001 | US6204136 Post-spacer etch surface treatment for improved silicide formation |
| 03/20/2001 | US6204135 Method for patterning semiconductors with high precision, good homogeneity and reproducibility |
| 03/20/2001 | US6204134 Method for fabricating a self aligned contact plug |
| 03/20/2001 | US6204133 Self-aligned extension junction for reduced gate channel |
| 03/20/2001 | US6204132 Method of forming a silicide layer using an angled pre-amorphization implant |
| 03/20/2001 | US6204131 Trench structure for isolating semiconductor elements and method for forming the same |
| 03/20/2001 | US6204130 Semiconductor device having reduced polysilicon gate electrode width and method of manufacture thereof |
| 03/20/2001 | US6204129 Method for producing a high-voltage and low-voltage MOS transistor with salicide structure |
| 03/20/2001 | US6204128 Method for fabricating semiconductor device |
| 03/20/2001 | US6204127 Method of manufacturing bit lines in memory |
| 03/20/2001 | US6204126 Method to fabricate a new structure with multi-self-aligned for split-gate flash |
| 03/20/2001 | US6204125 Method of forming a gate in a stack gate flash EEPROM cell |
| 03/20/2001 | US6204124 Method for forming high density nonvolatile memories with high capacitive-coupling ratio |
| 03/20/2001 | US6204123 Vertical floating gate transistor with epitaxial channel |
| 03/20/2001 | US6204122 Methods of forming nonvolatile integrated circuit memory devices having high capacitive coupling ratios |
| 03/20/2001 | US6204121 Method for bottom electrode of capacitor |
| 03/20/2001 | US6204120 Semiconductor wafer pretreatment utilizing ultraviolet activated chlorine |
| 03/20/2001 | US6204119 Manufacturing method for a capacitor in an integrated memory circuit |
| 03/20/2001 | US6204118 Method for fabrication an open can-type stacked capacitor on local topology |
| 03/20/2001 | US6204117 Removal of silicon oxynitride on a capacitor electrode for selective hemispherical grain growth |
| 03/20/2001 | US6204116 Method of fabricating a capacitor with a low-resistance electrode structure in integrated circuit |
| 03/20/2001 | US6204115 Manufacture of high-density pillar memory cell arrangement |
| 03/20/2001 | US6204114 Method of making high density semiconductor memory |
| 03/20/2001 | US6204113 Method of forming data storage capacitors in dynamic random access memory cells |
| 03/20/2001 | US6204112 Process for forming a high density semiconductor device |
| 03/20/2001 | US6204111 Fabrication method of capacitor for integrated circuit |
| 03/20/2001 | US6204110 Methods of forming an SRAM |