| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 07/03/2001 | US6255181 Method for fabricating MOS semiconductor device having salicide region and LDD structure |
| 07/03/2001 | US6255180 Semiconductor device with outwardly tapered sidewall spacers and method for forming same |
| 07/03/2001 | US6255179 Plasma etch pre-silicide clean |
| 07/03/2001 | US6255178 Method for forming transistors with raised source and drains and device formed thereby |
| 07/03/2001 | US6255177 Method for fabricating a salicide gate |
| 07/03/2001 | US6255176 Method of forming trench for semiconductor device isolation |
| 07/03/2001 | US6255175 Fabrication of a field effect transistor with minimized parasitic Miller capacitance |
| 07/03/2001 | US6255174 Mos transistor with dual pocket implant |
| 07/03/2001 | US6255173 Method of forming gate electrode with titanium polycide structure |
| 07/03/2001 | US6255172 Electrically erasable non-volatile memory |
| 07/03/2001 | US6255171 Method of making dense SOI flash memory array structure |
| 07/03/2001 | US6255170 Flash memory and method for fabricating the same |
| 07/03/2001 | US6255169 Process for fabricating a high-endurance non-volatile memory device |
| 07/03/2001 | US6255168 Method for manufacturing bit line and bit line contact |
| 07/03/2001 | US6255167 Method of forming high density buried bit line flash EEPROM memory cell with a shallow trench floating gate |
| 07/03/2001 | US6255166 Nonvolatile memory cell, method of programming the same and nonvolatile memory array |
| 07/03/2001 | US6255165 Nitride plug to reduce gate edge lifting |
| 07/03/2001 | US6255164 EPROM cell structure and a method for forming the EPROM cell structure |
| 07/03/2001 | US6255163 Process for manufacturing selection transistors for nonvolatile serial-flash, EPROM, EEPROM and flash-EEPROM memories in standard or AMG configuration |
| 07/03/2001 | US6255162 Method of gap filling |
| 07/03/2001 | US6255161 Method of forming a capacitor and a contact plug |
| 07/03/2001 | US6255160 Cell design and process for making dynamic random access memory (DRAM) having one or more Gigabits of memory cells |
| 07/03/2001 | US6255159 Method to form hemispherical grained polysilicon |
| 07/03/2001 | US6255158 Process of manufacturing a vertical dynamic random access memory device |
| 07/03/2001 | US6255157 Method for forming a ferroelectric capacitor under the bit line |
| 07/03/2001 | US6255156 Method for forming porous silicon dioxide insulators and related structures |
| 07/03/2001 | US6255155 Nonvolatile memory and method for fabricating the same |
| 07/03/2001 | US6255154 Semiconductor device and method of manufacturing the same |
| 07/03/2001 | US6255153 Method of manufacturing a semiconductor device |
| 07/03/2001 | US6255152 Method of fabricating CMOS using Si-B layer to form source/drain extension junction |
| 07/03/2001 | US6255151 Semiconductor integrated circuit device and method of manufacturing same |
| 07/03/2001 | US6255149 Process for restricting interdiffusion in a semiconductor device with composite Si/SiGe gate |
| 07/03/2001 | US6255148 Polycrystal thin film forming method and forming system |
| 07/03/2001 | US6255147 Silicon on insulator circuit structure with extra narrow field transistors and method of forming same |
| 07/03/2001 | US6255146 Thin film transistor and a method of manufacturing thereof |
| 07/03/2001 | US6255145 Process for manufacturing patterned silicon-on-insulator layers with self-aligned trenches and resulting product |
| 07/03/2001 | US6255144 Repairing fuse for semiconductor device and method for fabricating the same |
| 07/03/2001 | US6255143 Flip chip thermally enhanced ball grid array |
| 07/03/2001 | US6255142 Method for underfilling semiconductor devices |
| 07/03/2001 | US6255140 Flip chip chip-scale package |
| 07/03/2001 | US6255138 Process for producing microencapsulated electroconductive filler |
| 07/03/2001 | US6255137 Method for making air pockets in an HDI context |
| 07/03/2001 | US6255136 Method of making electronic package with compressible heatsink structure |
| 07/03/2001 | US6255132 Method of lining up micro-balls |
| 07/03/2001 | US6255131 Liquid crystal display device |
| 07/03/2001 | US6255130 Thin film transistor array panel and a method for manufacturing the same |
| 07/03/2001 | US6255128 Non-contact method for determining the presence of a contaminant in a semiconductor device |
| 07/03/2001 | US6255127 Analyzing method and apparatus for minute foreign substances, and manufacturing methods for manufacturing semiconductor device and liquid crystal display device using the same |
| 07/03/2001 | US6255123 Methods of monitoring and maintaining concentrations of selected species in solutions during semiconductor processing |
| 07/03/2001 | US6255122 Amorphous dielectric capacitors on silicon |
| 07/03/2001 | US6255121 Method for fabricating ferroelectric field effect transistor having an interface insulator layer formed by a liquid precursor |
| 07/03/2001 | US6255041 Method for formation of patterned resist layer |
| 07/03/2001 | US6255038 Process for modulating interferometric lithography patterns to record selected discrete patterns in photoresist |
| 07/03/2001 | US6255035 Method of creating optimal photoresist structures used in the manufacture of metal T-gates for high-speed semiconductor devices |
| 07/03/2001 | US6255004 III-V nitride semiconductor devices and process for the production thereof |
| 07/03/2001 | US6255002 To a capsule in an rf-power transistor. |
| 07/03/2001 | US6254942 Pellicle case having chemical traps |
| 07/03/2001 | US6254936 Environment exchange control for material on a wafer surface |
| 07/03/2001 | US6254933 Heating semiconductor to create convection between substrate and side walls; crystallizing thin film |
| 07/03/2001 | US6254923 Solder particle deposition |
| 07/03/2001 | US6254827 Placing chip adjacent to substrate; forming electrically conductive interconnects, interconnecting electrically conductive traces on first surface of chip with traces on substrate; light exposure; applying wickable sealent; curing |
| 07/03/2001 | US6254815 Mounting sensing die overlying hole of die bond pad; enclosing sensing die within mold; introducing molding material into mold to form package |
| 07/03/2001 | US6254796 Selective etching of silicate |
| 07/03/2001 | US6254794 Providing substrate having porous silicon layer and non-porous silicon layer; selectively etching porous silicon layer with etching liquid comprising hydrogen fluoride, hydrogen peroxide and alcohol to leave non-porous silicon layer |
| 07/03/2001 | US6254792 Isotropic dry cleaning process for noble metal integrated circuit structures |
| 07/03/2001 | US6254767 Semiconductor device manufacturing apparatus having controller detecting function of filter |
| 07/03/2001 | US6254760 Electro-chemical deposition system and method |
| 07/03/2001 | US6254746 Recessed coil for generating a plasma |
| 07/03/2001 | US6254745 Ionized physical vapor deposition method and apparatus with magnetic bucket and concentric plasma and material source |
| 07/03/2001 | US6254738 Use of variable impedance having rotating core to control coil sputter distribution |
| 07/03/2001 | US6254737 Active shield for generating a plasma for sputtering |
| 07/03/2001 | US6254721 Method and apparatus for processing samples |
| 07/03/2001 | US6254720 Wafer-processing apparatus |
| 07/03/2001 | US6254719 Method for controlled removal of material from a solid surface |
| 07/03/2001 | US6254718 Combined CMP and plasma etching wafer flattening system |
| 07/03/2001 | US6254690 Brushing |
| 07/03/2001 | US6254688 Scrub cleaning two brushes and ultrasonic cleaning by ultrasonic vibrations, semiconductor wafers |
| 07/03/2001 | US6254686 Vented lower liner for heating exhaust gas from a single substrate reactor |
| 07/03/2001 | US6254683 Substrate temperature control method and device |
| 07/03/2001 | US6254677 Semiconductor crystal, and method and apparatus of production thereof |
| 07/03/2001 | US6254676 Method for manufacturing metal oxide semiconductor transistor having raised source/drain |
| 07/03/2001 | US6254675 Production of epitactic GaN layers on substrates |
| 07/03/2001 | US6254672 Low defect density self-interstitial dominated silicon |
| 07/03/2001 | US6254457 Process for polishing wafers of integrated circuits |
| 07/03/2001 | US6254453 Optimization of chemical mechanical process by detection of oxide/nitride interface using CLD system |
| 07/03/2001 | US6254398 Method for initiating a helium alarm particle detector in a dry etching system prior to initiation of the etching process |
| 07/03/2001 | US6254378 Injection molding apparatus |
| 07/03/2001 | US6254328 High vacuum dual stage load lock and method for loading and unloading wafers using a high vacuum dual stage load lock |
| 07/03/2001 | US6254155 Apparatus and method for reliably releasing wet, thin wafers |
| 07/03/2001 | US6253992 Solder ball placement fixtures and methods |
| 07/03/2001 | US6253991 Extended travel wire bonding machine |
| 07/03/2001 | US6253990 Method for positioning the bond head in a wire bonding machine |
| 07/03/2001 | US6253986 Solder disc connection |
| 07/03/2001 | US6253985 Unit for supplying solder balls |
| 07/03/2001 | US6253829 Heat sink, and process and apparatus for manufacturing the same |
| 07/03/2001 | US6253775 Cleaning apparatus |
| 07/03/2001 | US6253623 Method for nondestructively measuring the stress of fabricated semiconductor chips |
| 07/03/2001 | US6253464 Method for protection of lithographic components from particle contamination |
| 07/03/2001 | US6253452 Method for manufacturing cylindrical radiator |
| 07/03/2001 | CA2215750C Magnification correction for small field scanning |