Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2001
06/26/2001US6253354 Method and apparatus for analyzing variations in source voltage of semiconductor device
06/26/2001US6253342 Semiconductor integrated circuit
06/26/2001US6253118 Substrate transport method and apparatus
06/26/2001US6253117 Vacuum processing apparatus and semiconductor manufacturing line using the same
06/26/2001US6253029 Vacuum processing apparatus
06/26/2001US6253026 Optical disc, recording apparatus, and computer-readable recording medium
06/26/2001US6252981 System and method for selection of a reference die
06/26/2001US6252817 Read only memory with neighboring memory blocks sharing block selection lines
06/26/2001US6252809 Semiconductor memory device capable of easily determining locations of defective memory cells by selectively isolating and testing redundancy memory cell block
06/26/2001US6252799 Device with embedded flash and EEPROM memories
06/26/2001US6252797 Masked ROM and manufacturing process therefor
06/26/2001US6252796 Device comprising a first and a second ferromagnetic layer separated by a non-magnetic spacer layer
06/26/2001US6252769 Device for increasing heat transfer
06/26/2001US6252758 Method for reducing particles from an electrostatic chuck and an equipment for manufacturing a semiconductor
06/26/2001US6252756 Low voltage modular room ionization system
06/26/2001US6252705 Stage for charged particle microscopy system
06/26/2001US6252651 Exposure method and exposure apparatus using it
06/26/2001US6252650 Exposure apparatus, output control method for energy source, laser device using the control method, and method of producing microdevice
06/26/2001US6252648 Exposure apparatus and method of cleaning optical element of the same
06/26/2001US6252451 Switching circuit
06/26/2001US6252447 Edge transition detection circuit with variable impedance delay elements
06/26/2001US6252427 CMOS inverter and standard cell using the same
06/26/2001US6252423 Voltage tolerant interface circuit
06/26/2001US6252422 Overvoltage-tolerant interface for intergrated circuits
06/26/2001US6252415 Pin block structure for mounting contact pins
06/26/2001US6252412 Method of detecting defects in patterned substrates
06/26/2001US6252392 Probe station having environment control chamber with bendably extensible and retractable lateral wall assembly
06/26/2001US6252354 RF tuning method for an RF plasma reactor using frequency servoing and power, voltage, current or DI/DT control
06/26/2001US6252344 Electron gun used in an electron beam exposure apparatus
06/26/2001US6252340 Field emission element with antireflection film
06/26/2001US6252314 Linear motor and stage system, and scanning exposure apparatus using the same
06/26/2001US6252309 Packaged semiconductor substrate
06/26/2001US6252308 Packaged die PCB with heat sink encapsulant
06/26/2001US6252307 Structure for preventing adhesive bleed onto surfaces
06/26/2001US6252306 Method of producing semiconductor device and configuration thereof, and lead frame used in said method
06/26/2001US6252304 Metallized vias with and method of fabrication
06/26/2001US6252303 Intergration of low-K SiOF as inter-layer dielectric
06/26/2001US6252301 Compliant semiconductor chip assemblies and methods of making same
06/26/2001US6252300 Direct contact through hole type wafer structure
06/26/2001US6252297 Array substrate, liquid crystal display device and their manufacturing method
06/26/2001US6252296 Semiconductor device with silicon oxynitride gate insulating film
06/26/2001US6252295 Adhesion of silicon carbide films
06/26/2001US6252294 Semiconductor device and semiconductor storage device
06/26/2001US6252293 Laser antifuse using gate capacitor
06/26/2001US6252292 Vertical electrical cavity-fuse
06/26/2001US6252291 Modifiable semiconductor circuit element
06/26/2001US6252290 Method to form, and structure of, a dual damascene interconnect device
06/26/2001US6252284 Planarized silicon fin device
06/26/2001US6252283 CMOS transistor design for shared N+/P+ electrode with enhanced device performance
06/26/2001US6252282 Semiconductor device with a bipolar transistor, and method of manufacturing such a device
06/26/2001US6252281 Semiconductor device having an SOI substrate
06/26/2001US6252280 Semiconductor device and manufacturing method thereof
06/26/2001US6252277 Embedded polysilicon gate MOSFET
06/26/2001US6252276 Non-volatile semiconductor memory device including assymetrically nitrogen doped gate oxide
06/26/2001US6252275 Silicon-on-insulator non-volatile random access memory device
06/26/2001US6252274 Process for making crosspoint memory devices with cells having a source channel which is autoaligned to the bit line and to the field oxide
06/26/2001US6252273 Nonvolatile reprogrammable interconnect cell with FN tunneling device for programming and erase
06/26/2001US6252272 Semiconductor device, and method of fabricating the same
06/26/2001US6252271 Flash memory structure using sidewall floating gate and method for forming the same
06/26/2001US6252270 Increased cycle specification for floating-gate and method of manufacture thereof
06/26/2001US6252269 Semiconductor memory device
06/26/2001US6252268 Method of forming transistors in a peripheral circuit of a semiconductor memory device
06/26/2001US6252267 Five square folded-bitline DRAM cell
06/26/2001US6252266 Field effect transistor with comb electrodes and via holes
06/26/2001US6252265 Single-layer-electrode type two-phase charge coupled device having smooth charge transfer
06/26/2001US6252263 Layout structure for dynamic random access memory
06/26/2001US6252262 Metal passivating layer for III-V semiconductors, and improved gate contact for III-V-based metal-insulator-semiconductor (MIS) devices
06/26/2001US6252261 GaN crystal film, a group III element nitride semiconductor wafer and a manufacturing process therefor
06/26/2001US6252259 Semiconductor switching device having different carrier lifetimes between a first portion serving as a main current path and the remaining portion of the device
06/26/2001US6252257 Isolating wall between power components
06/26/2001US6252256 Overvoltage protection circuit
06/26/2001US6252255 Crystal growth method for nitride semiconductor, nitride light emitting device, and method for producing the same
06/26/2001US6252249 Semiconductor device having crystalline silicon clusters
06/26/2001US6252248 Thin film transistor and display
06/26/2001US6252247 Thin film transistor, a method for producing the thin film transistor, and a liquid crystal display using a TFT array substrate
06/26/2001US6252234 Reaction force isolation system for a planar motor
06/26/2001US6252233 Instantaneous balance control scheme for ionizer
06/26/2001US6252228 Method of analyzing morphology of bulk defect and surface defect on semiconductor wafer
06/26/2001US6252222 Differential pulsed laser beam probing of integrated circuits
06/26/2001US6252197 Method and apparatus for separating non-metallic substrates utilizing a supplemental mechanical force applicator
06/26/2001US6252175 Electronic assembly comprising a substrate and a plurality of springable interconnection elements secured to terminals of the substrate
06/26/2001US6252010 Siloxane-modified polyamideimide resin composition, adhesive film, adhesive sheet and semiconductor device
06/26/2001US6251807 Method for improving thickness uniformity of deposited ozone-teos silicate glass layers
06/26/2001US6251806 Method to improve the roughness of metal deposition on low-k material
06/26/2001US6251805 Forming polysilsequioxane over substrate; heat treatment
06/26/2001US6251804 Oxidation; forming hexamethyldisilazane
06/26/2001US6251803 Method for forming a titanium dioxide layer
06/26/2001US6251802 Reducing etch rate
06/26/2001US6251801 Method and apparatus for manufacturing semiconductor device
06/26/2001US6251800 Ultrathin deposited gate dielectric formation using low-power, low-pressure PECVD for improved semiconductor device performance
06/26/2001US6251799 Method to provide low dielectric constant voids between adjacent conducting lines in a semiconductor device
06/26/2001US6251798 Formation of air gap structures for inter-metal dielectric application
06/26/2001US6251797 Method of fabricating semiconductor device
06/26/2001US6251796 Etching a dielectric in semiconductor wafer using tantalum nitride barrier
06/26/2001US6251795 Method for depositing high density plasma chemical vapor deposition oxide with improved topography
06/26/2001US6251794 Method and apparatus with heat treatment for stripping photoresist to eliminate post-strip photoresist extrusion defects
06/26/2001US6251793 Particle controlling method for a plasma processing chamber
06/26/2001US6251792 Plasma etch processes
06/26/2001US6251791 Eliminating etching microloading effect by in situ deposition and etching
06/26/2001US6251790 Method for fabricating contacts in a semiconductor device