Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2001
06/19/2001US6248175 Nozzle arm movement for resist development
06/19/2001US6248171 Yield and line width performance for liquid polymers and other materials
06/19/2001US6248144 Process for producing polishing composition
06/19/2001US6248009 Apparatus for cleaning substrate
06/19/2001US6248001 Semiconductor die de-processing using a die holder and chemical mechanical polishing
06/19/2001US6247998 Method and apparatus for determining substrate layer thickness during chemical mechanical polishing
06/19/2001US6247986 Method for precise molding and alignment of structures on a substrate using a stretchable mold
06/19/2001US6247889 Multiple-shaft power transmission apparatus and wafer transport arm link
06/19/2001US6247853 Incremental method for critical area and critical region computation of via blocks
06/19/2001US6247640 Conductive particle arranging device and conductive particle transferring method using the same
06/19/2001US6247637 Method of integrated circuit assembly
06/19/2001US6247597 Semiconductor wafer accommodating jig
06/19/2001US6247579 Substrate transfer apparatus and method of substrate transfer
06/19/2001US6247481 Apparatus and method for wet cleaning or etching a flat substrate
06/19/2001US6247479 Washing/drying process apparatus and washing/drying process method
06/19/2001US6247425 Method and apparatus for improving processing and reducing charge damage in an inductively coupled plasma reactor
06/19/2001US6247368 CMP wet application wafer sensor
06/19/2001US6247245 Processing unit for substrate manufacture
06/19/2001US6247229 Method of forming an integrated circuit device package using a plastic tape as a base
06/19/2001US6247227 Apparatus for assembling parts in a carrier strip
06/19/2001US6247221 Method for sealing and/or joining an end of a ceramic filter
06/19/2001US6247198 Cleaning apparatus
06/19/2001US6247197 Brush interflow distributor
06/14/2001WO2001043518A1 Chip package with molded underfill
06/14/2001WO2001043282A1 Variable load switchable impedance matching system
06/14/2001WO2001043267A1 Power supply with flux-controlled transformer
06/14/2001WO2001043201A1 Semiconductor device with a diode, and method of manufacturing such a device
06/14/2001WO2001043200A1 Controllable semiconductor switching element that blocks in both directions
06/14/2001WO2001043198A2 Source/drain-on-insulator (s/doi) field effect transistor using silicon nitride and silicon oxide and method of fabrication
06/14/2001WO2001043197A2 Source/drain-on-insulator (s/doi) field effect transistors and method of fabrication
06/14/2001WO2001043194A1 Intelligent gate-level fill methods for reducing global pattern density effects
06/14/2001WO2001043188A1 Electronic part module, method of producing the same, etc.
06/14/2001WO2001043187A2 Removal of silicon oxynitride material using a wet chemical process after gate etch processing
06/14/2001WO2001043186A1 Body contacted silicon-on-insulator (soi) structure and method of fabrication
06/14/2001WO2001043185A1 Method of fabricating an optoelectronic device
06/14/2001WO2001043184A2 Electrostatic chucks with flat film electrode
06/14/2001WO2001043183A2 Electrostatic chuck, susceptor and method for fabrication
06/14/2001WO2001043182A1 Mold release film for sealing semiconductor element and sealing method for semiconductor element using it
06/14/2001WO2001043181A1 Methods for producing packaged integrated circuit devices & packaged integrated circuit devices produced thereby
06/14/2001WO2001043180A1 Thin film transistor and method of manufacturing the same
06/14/2001WO2001043179A2 Method for producing a crystallized ceramic layer by means of laser annealing
06/14/2001WO2001043177A1 Method for establishing ultra-thin gate insulator using anneal in ammonia
06/14/2001WO2001043176A1 Semiconductor device having a self-aligned contact structure and methods of forming the same
06/14/2001WO2001043175A1 Ultra-shallow junction using a dopant layer having a peak concentration within a dielectric layer
06/14/2001WO2001043174A2 Fabrication of gallium nitride layers on textured silicon substrates
06/14/2001WO2001043172A1 Passivated silicon carbide devices with low leakage current and method of fabricating
06/14/2001WO2001043171A1 Method for producing a hard mask
06/14/2001WO2001043170A2 Dynamic brake for non-contact wafer holder
06/14/2001WO2001043169A2 Methods for separating microcircuit dies from wafers
06/14/2001WO2001043168A2 Method for handling semiconductor substrates during processing and/or machining
06/14/2001WO2001043165A2 Oxide films containing p-type dopant and process for preparing same
06/14/2001WO2001043157A1 Ion implantation ion source, system and method
06/14/2001WO2001042994A2 Modification of integrated circuits
06/14/2001WO2001042858A1 Device and method in connection with the production of structures
06/14/2001WO2001042855A2 Lithography device which uses a source of radiation in the extreme ultraviolet range and multi-layered mirrors with a broad spectral band in this range
06/14/2001WO2001042853A2 Photoresist composition for deep uv radiation
06/14/2001WO2001042820A2 Method of making optoelectronic devices using sacrificial devices
06/14/2001WO2001042767A2 Detecting a process endpoint from a change in reflectivity
06/14/2001WO2001042766A2 Method and production of a sensor
06/14/2001WO2001042727A2 Method, apparatus, and composition for drying solid articles
06/14/2001WO2001042694A2 Distribution system of modular process lines
06/14/2001WO2001042539A1 Method and apparatus for delivering precursors to a plurality of epitaxial reactor sites
06/14/2001WO2001042529A1 METHOD FOR FORMING TiSiN FILM, DIFFUSION PREVENTIVE FILM COMPRISING TiSiN FILM, SEMICONDUCTOR DEVICE AND ITS PRODUCTION METHOD, AND APPARATUS FOR FORMING TiSiN FILM
06/14/2001WO2001042526A1 Plasma processing container internal member and production method therefor
06/14/2001WO2001042163A2 High-purity low-resistivity electrostatic chucks
06/14/2001WO2001041973A2 Chemical-mechanical polishing method
06/14/2001WO2001041963A2 Systems and methods for application of atmospheric plasma surface treatment to various electronic component packaging and assembly methods
06/14/2001WO2001041962A2 Non-contact workpiece holder
06/14/2001WO2001041959A2 Monitoring system for dicing saws
06/14/2001WO2001041946A1 Cleaning of material surfaces using gas
06/14/2001WO2001041544A2 Deposition of gate stacks including silicon germanium layers
06/14/2001WO2001029885A3 Method for production of a capacitor electrode with a barrier structure
06/14/2001WO2001018849A3 Integrated circuit arrangement with at least a capacitor and a method for the production of the said
06/14/2001WO2001011672A8 Method of etching a layer using sacrificial elements
06/14/2001WO2001002133A3 Improvement in and relating to edge grinding
06/14/2001WO2000078654A9 Improved wafer handling apparatus
06/14/2001WO2000074116A3 Apparatus and methods for drying batches of disks
06/14/2001US20010003700 CMP slurry recycling apparatus and method for recycling CMP slurry
06/14/2001US20010003698 Polishing machine having a plurality of abrasive pads
06/14/2001US20010003680 Process for the wet chemical treatment of semiconductor wafers
06/14/2001US20010003679 Made of silicon nitride with hydrogen incorporated therein by increasing ammonia flow or decreasing silane flow during a plasma enhanced chemical vapor deposition; use in silicon oxide dry fluorine etch; integrated circuits
06/14/2001US20010003678 Oxide plasma etching process with a controlled wineglass shape
06/14/2001US20010003677 Making a low-resistance contact by placing a cadmium sulfide/cadmium telleride layer into chamber, evacuating, filling with argon, generating plasma ignition by energizing a cathode
06/14/2001US20010003676 Cobalt silicide etch process and apparatus
06/14/2001US20010003675 Method for manufacturing a semiconductor device
06/14/2001US20010003674 Method of manufacturing bottom electrode of capacitor
06/14/2001US20010003672 For low resistance silicon wafers, comprising water, an abrasive and as additive one or more of: an alkali metal hydroxide, carbonate, or hydrogen carbonate, a quaternary ammonium salt, a peroxide, and a peroxoacid compound
06/14/2001US20010003671 By forming a silicon film doped with impurities on a semiconductor substrate, forming a refractory metal film on the silicon film and siliciding by heat treatment to form a refractory metal silicide film
06/14/2001US20010003670 Method of producing rough polysilicon by the use of pulsed plasma chemical vapor deposition and products produced by the same
06/14/2001US20010003669 Processing methods of forming an electrically conductive plug to a node location
06/14/2001US20010003668 Applying a force asymmetric with respect to the interface between first and second members, to the end portion of the composite member to form a crack; growing crack along the separation layer to separate the member; silicon on insulator
06/14/2001US20010003667 Forming a polysilicon structure on a layer of the transistor; and substituting metal for at least a portion of the polysilicon structure
06/14/2001US20010003666 By using a combination of arsenic and phosphorus to tailor the lateral profile to meet both series resistance and channel hot carrier requirements; relatively higher dose of arsenic
06/14/2001US20010003665 In which dummy plate electrodes and charge storage electrodes of the same height as the stacked capacitor are formed at the logic circuit region when the stacked capacitor are formed at the memory cell region; forming fine interconnection lines
06/14/2001US20010003664 Semiconductor device and method for manufacturing same
06/14/2001US20010003663 Method for making closely spaced capacitors with reduced parasitic capacitance on a dynamic random access memory (DRAM) device
06/14/2001US20010003662 Semiconductor device and method of manufacturing thereof
06/14/2001US20010003661 Forming a silicon nitride (Si3N4) capacitor dielectric layer over electrode, then oxidizing it in the presence of a chlorine containing atmosphere to form a silicon oxynitride layer containing chlorine, forming second capacitor electrode
06/14/2001US20010003660 Forming well layer through high energy ion implantation, so the n-type buried layer is suppressed from being enlarged, reducing time required for forming the trench
06/14/2001US20010003659 Method of manufacturing a semiconductor device