Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2001
06/21/2001US20010004556 Contact structure and production method thereof and probe contact assembly using same
06/21/2001US20010004554 Vacuum processing apparatus and operating method therefor
06/21/2001US20010004553 Method for etching doped polysilicon with high selectivity to undoped polysilicon
06/21/2001US20010004552 For etching a dielectric layer with an underlying stop layer; particularly applicable to forming a dual-damascene interconnect structure by a counterbore process
06/21/2001US20010004551 No grain boundary is contained in region of wiring between upper and lower plugs; difference in thermal expansion coefficient between material of wiring and material of upper and lower plugs is so small that no void is generated
06/21/2001US20010004550 Damascene-type interconnection structure and its production process
06/21/2001US20010004547 Dissolving barium fluorotitante powder in water, adding boric acid solution to form mixture, immersing silicon wafer in mixture at a specific temperature to grow barium titanate film on wafer
06/21/2001US20010004546 Heat conductive mold and manufacturing method thereof
06/21/2001US20010004545 Loading substrate in reactor and providing carrier gas therein, performing low temperature bake cycle on substrate at 850 degrees C, heating substrate while providing N+ dopant gas, performing high temperature baking, etching
06/21/2001US20010004544 Dividing wafer, treating perimeter edges to remove a substantial portion of remaining substrate material layer or scribe therefrom without exposing active circuitry of die
06/21/2001US20010004543 Depositing an oxide layer over a substrate and exposing the deposited oxide layer to a chlorine containing gas effective to getter metals outwardly therefrom
06/21/2001US20010004542 Method of manufacturing a semiconductor device
06/21/2001US20010004541 Forming mask layer on surface of semiconductor substrate, selectively removing region of mask layer forming gate region, forming implantation mask layer on surface of mask layer in region including gate, forming anti-punch-through region
06/21/2001US20010004540 Grooved planar DRAM transfer device using buried pocket
06/21/2001US20010004539 Dielectric layer comprising at least one polymer material selected from the group consisting of polybenzoxazole, polynorbornene, and their derivatives
06/21/2001US20010004538 Computer readable medium is provided bearing instructions to control polishing system to polish substrate surface at a first removal rate on a first platen and then polish at a second removal rate less than the first rate
06/21/2001US20010004537 Method for fabricating thin film transistors
06/21/2001US20010004536 Laminated glass fabric body made by laminating a plurality of glass fabrics and impregnating with resin, semiconductor pellet disposed on wiring substrate has a plurality of projected electrodes coupled to pad electrodes
06/21/2001US20010004535 Forming gate electrode on substrate, forming first insulating layer and semiconductor layer over gate electrode, coating semiconductor layer with photoresist, exposing and developing photoresist to form pattern, etching
06/21/2001US20010004533 Preparing a semiconductor substrate, forming a first electrode on the substrate, depositing a ferroelectric barium strontium titinate on lower electrode, high temperature treatment for crystallization of the oxide, removal of carbon
06/21/2001US20010004508 Light exposure method, light exposure apparatus, pellicle and method for relieving warpage of pellicle membrane
06/21/2001US20010004488 Method of manufacturing crystal of III-V compounds of the nitride system, crystal substrate of III-V compounds of the nitride system, crystal film of III-V compounds of the nitride system, and method of manufacturing device
06/21/2001US20010004479 Reacting silicon compound(s) that contain carbon e.g., methyl-or dimethylsilane, with an oxidizing gas, e.g. nitrous oxide, at a constant radio frequency power at a low level; adhesion of silicon oxide; etch stop; damascene films
06/21/2001US20010004478 Plasma treatment of titanium nitride formed by chemical vapor deposition
06/21/2001US20010004477 Solution containing metal component, method of and apparatus for forming thin metal film
06/21/2001US20010004476 Applying pulse-shape voltage to insulator while insulator is irradiated with electron beam
06/21/2001US20010004467 Deposition method, deposition apparatus, and pressure-reduction drying apparatus
06/21/2001US20010004332 NROM cell with improved programming, erasing and cycling
06/21/2001US20010004331 Semiconductor storage device
06/21/2001US20010004330 Non-volatile semiconductor memory device and manufacturing method thereof
06/21/2001US20010004325 Nonvolatile memory cell and method for programming and/or verifying the same
06/21/2001US20010004314 Module with thin-film circuit comprising a trimmable capacitor
06/21/2001US20010004245 CAD data compressing method and apparatus thereof
06/21/2001US20010004217 Signal transmission circuit on semiconductor integrated circuit chip
06/21/2001US20010004210 Sheet resistance meter and method of manufacturing electronic components
06/21/2001US20010004185 Charged-particle beam exposure apparatus, exposure system, control method therefor, and device manufacturing method
06/21/2001US20010004140 Furnace of apparatus for manufacturing a semiconductor device having a heat blocker for preventing heat loss during the unloading of wafers
06/21/2001US20010004135 Flip-chip bonded semiconductor device
06/21/2001US20010004134 Electronic device and method of producing same
06/21/2001US20010004133 Semiconductor device and manufacturing method therefor
06/21/2001US20010004131 Adhesion method and electronic component
06/21/2001US20010004130 Semiconductor device and production method thereof
06/21/2001US20010004128 Semiconductor package and manufacturing method thereof
06/21/2001US20010004127 Semiconductor device and manufacturing method thereof
06/21/2001US20010004126 Configuration for trimming reference voltages in semiconductor chips, in particular semiconductor memories
06/21/2001US20010004123 Semiconductor integrated circuit having diagnosis function
06/21/2001US20010004122 Semiconductor device having dummy gates and its manufacturing method
06/21/2001US20010004121 Semiconductor device and method of manufacturing the same
06/21/2001US20010004120 Non-volatile memory cells, high voltage transistors and logic transistors integrated on a single chip
06/21/2001US20010004119 Non-volatile memory device and manufacturing process thereof
06/21/2001US20010004105 Crash prevention in positioning apparatus for use in lithographic projection apparatus
06/21/2001US20010004104 Radiation source for use in lithographic projection apparatus
06/21/2001US20010004085 Method for hermetically encapsulating microsystems in situ
06/21/2001US20010004066 Making surface of resist layer hydrophilic and removing resist layer using processing liquid; etching a semiconductor wfer and then removing a resist layer and a polymer layer on the substrate, for example
06/21/2001US20010004002 Die bonding method and apparatus
06/21/2001US20010003988 Methods of processing semiconductor wafers, methods of supporting a plurality of semiconductor wafers, methods of processing electronic device workpieces and methods of orienting electronic device workpieces
06/21/2001US20010003968 Reduced slide resistance to restrain the vibration when discharge nozzle is moved
06/21/2001US20010003967 Coating film forming apparatus
06/21/2001US20010003966 Film forming apparatus
06/21/2001US20010003965 Coating processing apparatus
06/21/2001US20010003964 Coating film forming apparatus and coating unit
06/21/2001US20010003958 Automatic transport system
06/21/2001US20010003937 Process for sawing substrate strip
06/21/2001US20010003926 Device for controlling the drive of mechanisms operating separately from one another
06/21/2001US20010003901 Integrated bake and chill plate
06/21/2001US20010003883 Abrasive machine
06/21/2001US20010003873 Vacuum processing apparatus and operating method therefor
06/21/2001DE19961297A1 Wiring arrangement to prevent polarity reversion of DMOS transistor; has charge carrier area comprising individual spaced part-charge carrier areas which are electrically connected together
06/21/2001DE19959711A1 Verfahren zur Herstellung einer strukturierten Metallschicht A method for producing a structured metal layer
06/21/2001DE19959558A1 Reinigung von Materialoberflächen mit Gasen Cleaning of material surfaces with gases
06/21/2001DE19959346A1 Production of a solid body having a microstructure comprises diffusing a material into a substrate region covered by a masking layer, removing the masking layer
06/21/2001DE19958904A1 Verfahren zur Herstellung einer Hartmaske A process for producing a hard mask
06/21/2001DE19958234A1 Configuration for electric isolation of two active cells in semiconductor body
06/21/2001DE19957034A1 Treating the surfaces of substrates, e.g. semiconductor substrates comprises producing reactive fragments, especially radicals or ions, using UV radiation from a UV radiator as discharge lamp
06/21/2001DE19954344A1 MOS transistor for driver circuit
06/21/2001DE10062542A1 Semiconductor chip arrangement for flip chip; has base plate metallized rear surface and source and gate contacts connected to contacts of connection frame and has casing with window near rear surface
06/21/2001DE10059234A1 Electrically conducting paste used in the production of printed circuit boards comprises complexes produced by mixing an electrically conducting filler and a heating element, and a resin
06/21/2001DE10050068A1 Method of analyzing factors responsible for errors in wafer patterns during the manufacture of semiconductor device, involves placing first and second masks in etching chamber to form an overlapping zone between the two masks
06/21/2001DE10032490A1 Production of samples with synthetically-produced particles comprises transferring required particle distribution onto silicon wafer
06/21/2001CA2393971A1 Method for implementing a physical design for a dynamically reconfigurable logic circuit
06/21/2001CA2393781A1 Microreaction systems and molding methods
06/21/2001CA2393443A1 Mosfet device system and method
06/20/2001EP1109427A2 Radiation source for use in lithographic projection apparatus
06/20/2001EP1109423A1 Ceramic heater and method for producing the same, and conductive paste for heating element
06/20/2001EP1109227A2 Via capacitor
06/20/2001EP1109226A2 Semiconductor device and its manufacturing method capable of reducing low frequency noise
06/20/2001EP1109223A1 Semiconductor device and method for fabricating the same
06/20/2001EP1109222A1 Arrangement for trimming voltage references in semiconductor chips, especially in semiconductor memories
06/20/2001EP1109221A2 Damascene interconnection structure and method for forming the same
06/20/2001EP1109220A2 Dielectric filling of electrical wiring levels
06/20/2001EP1109219A2 Semiconductor device having a wiring layer
06/20/2001EP1109218A2 Heat conducting mold and manufacturing method thereof
06/20/2001EP1109217A1 Method of manufacturing low and high voltage CMOS transistors with EPROM cells
06/20/2001EP1109216A1 Process of making a semiconductor device having regions of insulating material formed in a semiconductor substrate
06/20/2001EP1109215A2 Apparatus and method for solder bump inspection
06/20/2001EP1109214A1 Device and method to contact circuit components
06/20/2001EP1109213A2 Method for producing a semiconductor device
06/20/2001EP1109212A2 Semiconductor structure having a crystalline alkaline earth metal silicon nitride/oxide interface with silicon
06/20/2001EP1109211A2 Method of reducing undesired etching of insulation due to elevated boron concentrations
06/20/2001EP1109209A1 Process for fabricating monocrystalline silicon nanometric lines and resulting device