Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2001
06/19/2001US6249029 Device method for enhanced avalanche SOI CMOS
06/19/2001US6249028 Operable floating gate contact for SOI with high Vt well
06/19/2001US6249026 MOS Transistor with a buried oxide film containing fluorine
06/19/2001US6249025 Using epitaxially grown wells for reducing junction capacitances
06/19/2001US6249022 Trench flash memory with nitride spacers for electron trapping
06/19/2001US6249021 Nonvolatile semiconductor memory device and method of manufacturing the same
06/19/2001US6249019 Container capacitor with increased surface area and method for making same
06/19/2001US6249018 Fabrication method to approach the conducting structure of a DRAM cell with straightforward bit line
06/19/2001US6249017 Highly reliable trench capacitor type memory cell
06/19/2001US6249016 Integrated circuit capacitor including tapered plug
06/19/2001US6249015 Semiconductor device and fabrication method thereof
06/19/2001US6249014 Hydrogen barrier encapsulation techniques for the control of hydrogen induced degradation of ferroelectric capacitors in conjunction with multilevel metal processing for non-volatile integrated circuit memory devices
06/19/2001US6249013 Microwave-millimeter wave circuit device and method for manufacturing the same
06/19/2001US6248973 Laser marking method for semiconductor wafer
06/19/2001US6248967 IC testing apparatus
06/19/2001US6248962 Electrically conductive projections of the same material as their substrate
06/19/2001US6248874 Expression vectors for the generation of enzymatic protein
06/19/2001US6248852 Germanosiloxane materials and optical components comprising the same
06/19/2001US6248704 Compositions for cleaning organic and plasma etched residues for semiconductors devices
06/19/2001US6248675 Fabrication of field effect transistors having dual gates with gate dielectrics of high dielectric constant using lowered temperatures
06/19/2001US6248673 Hydrogen thermal annealing method for stabilizing microelectronic devices
06/19/2001US6248672 Method of producing a semiconductor device in a heating furnace having a reaction tube with a temperature-equalizing zone
06/19/2001US6248671 Semiconductor processing apparatuses, and methods of forming antireflective coating materials over substrates
06/19/2001US6248670 Method of wet processing
06/19/2001US6248669 Method for manufacturing a semiconductor device
06/19/2001US6248667 Chemical mechanical polishing method using double polishing stop layer
06/19/2001US6248666 Process of manufacturing a semiconductor device including a buried channel field effect transistor
06/19/2001US6248665 Delamination improvement between Cu and dielectrics for damascene process
06/19/2001US6248664 Forming active layer and oxide layer on backing for semiconductors
06/19/2001US6248662 Method of improving gap filling characteristics of dielectric layer by implantation
06/19/2001US6248661 Method for monitoring bubble formation and abnormal via defects in a spin-on-glass planarization, etchback process
06/19/2001US6248660 Method for forming metallic plug
06/19/2001US6248659 Method for forming an interconnect structure
06/19/2001US6248658 Method of forming submicron-dimensioned metal patterns
06/19/2001US6248657 Semiconductor device and method for manufacturing the same
06/19/2001US6248656 Metal-jacketed lead manufacturing process using resist layers
06/19/2001US6248654 Method for forming self-aligned contact
06/19/2001US6248653 Method of manufacturing gate structure
06/19/2001US6248652 Method of manufacture of a semiconductor device
06/19/2001US6248651 Low cost method of fabricating transient voltage suppressor semiconductor devices or the like
06/19/2001US6248650 Self-aligned BJT emitter contact
06/19/2001US6248649 Controlled cleavage process and device for patterned films using patterned implants
06/19/2001US6248648 Method of breaking and separating a wafer into die using a multi-radii dome
06/19/2001US6248647 Fabrication of integrated circuits on both sides of a semiconductor wafer
06/19/2001US6248646 Discrete wafer array process
06/19/2001US6248645 Semiconductor device having buried-type element isolation structure and method of manufacturing the same
06/19/2001US6248644 Method of fabricating shallow trench isolation structure
06/19/2001US6248643 Method of fabricating a self-aligned contact
06/19/2001US6248642 SIMOX using controlled water vapor for oxygen implants
06/19/2001US6248641 Method of fabricating shallow trench isolation
06/19/2001US6248640 Method for forming capacitor of semiconductor device using high temperature oxidation
06/19/2001US6248638 Enhancements to polysilicon gate
06/19/2001US6248637 Process for manufacturing MOS Transistors having elevated source and drain regions
06/19/2001US6248636 Method for forming contact holes of semiconductor memory device
06/19/2001US6248635 Process for fabricating a bit-line in a monos device using a dual layer hard mask
06/19/2001US6248633 Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory
06/19/2001US6248632 Method of forming gate electrode with polycide structure in semiconductor device
06/19/2001US6248631 Method for forming a v-shaped floating gate
06/19/2001US6248630 Process for forming an integrated circuit comprising non-volatile memory cells and side transistors and corresponding IC
06/19/2001US6248629 Process for fabricating a flash memory device
06/19/2001US6248628 Method of fabricating an ONO dielectric by nitridation for MNOS memory cells
06/19/2001US6248627 Method for protecting gate edges from charge gain/loss in semiconductor device
06/19/2001US6248626 Floating back gate electrically erasable programmable read-only memory (EEPROM)
06/19/2001US6248625 Manufacturing method of cylindrical-capacitor lower electrode
06/19/2001US6248624 Method for forming a dram stacked capacitor of zig-zag configuration
06/19/2001US6248623 Method for manufacturing embedded memory with different spacer widths
06/19/2001US6248622 Fabrication method for ultra short channel device comprising self-aligned landing pad
06/19/2001US6248621 Method of growing high-quality crystalline silicon quantum wells for RTD structures
06/19/2001US6248620 Method for fabricating a field effect-controlled semiconductor component
06/19/2001US6248619 Method of manufacturing a semiconductor device
06/19/2001US6248618 Method of fabrication of dual gate oxides for CMOS devices
06/19/2001US6248616 Method for suppressing parasitic effects in a junction-isolation integrated circuit
06/19/2001US6248614 Flip-chip package with optimized encapsulant adhesion and method
06/19/2001US6248608 Manufacturing method of a gallium nitride-based blue light emitting diode (LED) ohmic electrodes
06/19/2001US6248607 Method for manufacturing semiconductor light emitting device
06/19/2001US6248606 Method of manufacturing semiconductor chips for display
06/19/2001US6248603 Method of measuring dielectric layer thickness using SIMS
06/19/2001US6248602 Method and apparatus for automated rework within run-to-run control semiconductor manufacturing
06/19/2001US6248600 Led in substrate with back side monitoring
06/19/2001US6248599 Top-surface-metallurgy plate-up bonding and rewiring for multilayer devices
06/19/2001US6248549 Methods of modulating muscle contraction
06/19/2001US6248529 Method of chemically assembling nano-scale devices
06/19/2001US6248508 Manufacturing a circuit element
06/19/2001US6248486 Method of detecting aberrations of an optical imaging system
06/19/2001US6248459 Semiconductor structure having a crystalline alkaline earth metal oxide interface with silicon
06/19/2001US6248454 Composition for semiconductor encapsulation, which comprises epoxy resin, phenolic resin, cure accelerator, cure accelerator-containing microcapsules having core/shell structure with accelerator encapsulated in thermoplastic resin
06/19/2001US6248429 Metallized recess in a substrate
06/19/2001US6248409 Method for manufacturing antistatic integrated circuit trays of polymer materials using ion implantation
06/19/2001US6248398 Coater having a controllable pressurized process chamber for semiconductor processing
06/19/2001US6248252 Method of fabricating sub-micron metal lines
06/19/2001US6248250 RF plasma reactor with hybrid conductor and multi-radius dome ceiling
06/19/2001US6248223 Sputtering apparatus
06/19/2001US6248220 Radio frequency sputtering apparatus and film formation method using same
06/19/2001US6248206 Apparatus for sidewall profile control during an etch process
06/19/2001US6248201 Apparatus and method for chip processing
06/19/2001US6248180 Method for removing particles from a semiconductor wafer
06/19/2001US6248179 Cleaning of a semiconductor wafer exhibiting traces of a brominated residual polymer after plasma etching
06/19/2001US6248178 Method for removing pad nodules
06/19/2001US6248177 Method of cleaning a wafer carrier
06/19/2001US6248176 Apparatus and method for delivering a gas