Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2001
07/19/2001US20010008808 A Method Of Fabricating A DRAM Transistor With A Dual Gate Oxide Technique
07/19/2001US20010008807 Processing a semiconductor wafer sliced from a monocrystalline ingot, comprising at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning, wherein etching step comprises first stage and second stage etching
07/19/2001US20010008805 Useful for continuously producing negative ions in high density and also negative ions can be made incident on the semiconductor substrate to be processed to conduct ashing, etching and cleaning of the substrate to remove impurities
07/19/2001US20010008804 Wafer is placed upon the bearing surface of a support in such a manner that the support with the outer contour of its bearing surface projects all round beyond the inner contour of near-edged surface portion to be etched
07/19/2001US20010008803 Plasma surface treatment method and resulting device
07/19/2001US20010008802 Manufacturing method semiconductor integrated circuit including simultaneous formation of via hole reaching metal wiring and concave groove in interlayter film and semiconductor integrated circuit manufactured with the manufacturing method
07/19/2001US20010008801 A small amount of single-side lapping is repeated alternately on the two surfaces of a semiconductor silicon single crystal wafer to get to a predetermined total lapping stock removal
07/19/2001US20010008800 Placing the wafer substrate with chemical mechanical polishing residue in a pressure chamber, pressurizing the chamber, maintaining carbon dioxide supercritical fluid in contact with substrate until residue is removed
07/19/2001US20010008799 Forming a stacked semiconductor layer and conductive layer, after forming second conductive layer, by using the same mask providing separation between drain and source electrodes of transistor and connecting pixel electrode to source
07/19/2001US20010008798 Plasma treatment system and method
07/19/2001US20010008797 Introducing only one of a high melting metal composition gas and a reducing gas for a short time as a pre-process just before the film forming process to improve repeatability of a thickness and uniformity of thickness of the film
07/19/2001US20010008796 Phosphorus atom containing gas such as phosphine is added to the reactive gas to carry out tungsten silicide deposition; enhanced yields without forming voids in the electrode and/or wiring
07/19/2001US20010008795 Minimized contact resistance; side edge surface of each oxide film is retracted away from a frontal edge of the corresponding nitride film side wall into the wiring pattern, and each contact extends beneath the nitride film side wall
07/19/2001US20010008793 Method of forming metal layer(s) and/or antireflective coating layer(s) on an integrated circuit
07/19/2001US20010008792 Apparatus comprising bonding station, a semiconductor device support at the bonding station, an energy source providing energy beams, and an optical structure for directing the beams to bonding sites; bonds can be made simultaneously
07/19/2001US20010008791 High temperature pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates
07/19/2001US20010008790 Semiconductor device and alignment method
07/19/2001US20010008789 Structure and manufacturing method of semiconductor device having uneven surface at memory cell capacitor part
07/19/2001US20010008788 Double diffused Metal on Semiconductor (DMOS); steps of trench formation completed prior to removal of the patterned trench mask so dopant does not leach out of the p-body since the mask serves as barrier, preventing leakage current
07/19/2001US20010008787 Complementary first and second electroconductive materials are utilized to produce different complementary devices at approximately the same level on the substrate, with elimination of a mask step
07/19/2001US20010008786 NOR type; floating gates and a common source line, and drains; a region overlapping one of the drains and one of the floating gates in a memory cell is larger than a region overlapping the common source and one of the floating gates
07/19/2001US20010008785 Bottom end of a second polysilicon layer is inlayed within a vertical opening of the second dielectric layer to fix the bottom electrode on the semiconductor wafer and prevent the bottom electrode from collapsing during further processing
07/19/2001US20010008784 Method for coupling to semiconductor device in an integrated circuit having edge-defined, sub-lithographic conductors
07/19/2001US20010008783 Forming a storage electrode contact and a contact plug in a self-aligned method
07/19/2001US20010008782 Method and apparatus for manufacturing semiconductor device
07/19/2001US20010008781 Thin film transistor (TFT); forming polycrystalline silicon and having an off-set area or a lightly doped drain (LDD) structure
07/19/2001US20010008780 Encapsulating integrated circuits (IC's) by defining an encapsulation chamber about an IC die; filling the chamber with encapsulant; and controlling overflow of encapsulant by providing a collection cavity proximate to said chamber
07/19/2001US20010008779 Semiconductor device and manufacturing method
07/19/2001US20010008778 Temporary attach article and method for temporary attach of devices to a substrate
07/19/2001US20010008777 Flip chip technique for chip assembly
07/19/2001US20010008775 For sealing a lead frame with a semiconductor chip (SC); resin tape is kept in contact with a surface of the lead frame without the SC (non-mounting surface), for preventing molten resin from pouring onto the non-mounting surface
07/19/2001US20010008750 Method and apparatus for stabilizing high pressure oxidation of a semiconductor device
07/19/2001US20010008747 Process for filling apertures in a circuit board or chip carrier
07/19/2001US20010008746 Forming transistor having intake, drain on substrate; overcoating with dielectrics, forming capacitor; forming metal contactors by etching using photoresist as etching mask
07/19/2001US20010008742 Forming a conductive laye rover semiconductor; then photoresist; patterning
07/19/2001US20010008739 Compounds generate an acid upon irradiation with actinic rays
07/19/2001US20010008737 Exposure apparatus with a pulsed laser
07/19/2001US20010008685 Method for forming a gold plating electrode a substrate based on the electrode forming method ,and a wire bonding method utilizing this electrode forming method.
07/19/2001US20010008656 Bulk single crystal gallium nitride and method of making same
07/19/2001US20010008618 Removal semiconductor by-products
07/19/2001US20010008497 Semiconductor device
07/19/2001US20010008491 Semiconductor device with dram and logic part integrated
07/19/2001US20010008440 Optical system
07/19/2001US20010008434 Liquid crystal display and method of manufacture
07/19/2001US20010008400 Rendering processing apparatus requiring less storage capacity for memory and method therefor
07/19/2001US20010008379 Programmable integrated circuit device
07/19/2001US20010008312 Method for forming wiring pattern of a semiconductor integrated circuit
07/19/2001US20010008311 Semiconductor device and method for fabricating the same and apparatus for chemical mechanical polishing and method of chemical mechanical polishing
07/19/2001US20010008310 Method for forming bumps, semiconductor device, and solder paste
07/19/2001US20010008309 Interconnection substrate having metal columns covered by a resin film, and manufacturing method thereof
07/19/2001US20010008308 Integrated circuit chip and method for fabricating the same
07/19/2001US20010008307 Integrated circuit chip and method for fabricating the same
07/19/2001US20010008305 Leadless plastic chip carrier with etch back pad singulation
07/19/2001US20010008304 Semiconductor device and manufacturing method thereof
07/19/2001US20010008303 Semiconductor apparatus, a method of fabrication of the same, and a reinforcing tape used in fabrication of the same
07/19/2001US20010008302 Semiconductor device
07/19/2001US20010008300 Semiconductor device with flat protective adhesive sheet and method of manufacturing the same
07/19/2001US20010008299 Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on silicon carbide substrates by lateral growth from sidewalls of masked posts
07/19/2001US20010008298 Semiconductor device and method of manufacturing same
07/19/2001US20010008297 Semiconductor device and method for producing same
07/19/2001US20010008295 Semiconductor device and manufacturing method thereof
07/19/2001US20010008294 MOS transistor and fabrication method thereof
07/19/2001US20010008293 MIS transistor and manufacturing method thereof
07/19/2001US20010008292 Densely patterned silicon-on-insulator (SOI) region on a wafer
07/19/2001US20010008291 Semiconductor device and method for manufacturing the same
07/19/2001US20010008290 Semiconductor memory and method for fabricating the same
07/19/2001US20010008289 Dynamic random access memory device with shaped storage nodes
07/19/2001US20010008286 Semiconductor device with high-speed switching circuit implemented by mis transistors and process for fabrication thereof
07/19/2001US20010008285 Method for producing semiconductor and semiconductor laser device
07/19/2001US20010008284 Silicon-germanium BiCMOS on SOI
07/19/2001US20010008273 Abbe arm calibration system for use in lithographic apparatus
07/19/2001US20010008250 Method of forming a solder ball
07/19/2001US20010008248 Lead penetrating clamping system
07/19/2001US20010008247 Apparatuses for forming wire bonds from circuitry on a substrate to a semiconductor chip, and methods of forming semiconductor chip assemblies
07/19/2001US20010008232 Wafer support fixture composed of silicon
07/19/2001US20010008227 Dry etching method of metal oxide/photoresist film laminate
07/19/2001US20010008226 In-situ integrated oxide etch process particularly useful for copper dual damascene
07/19/2001US20010008225 Method of wiring formation and method for manufacturing electronic components
07/19/2001US20010008224 Method of manufacturing electronic components
07/19/2001US20010008216 Insert for use in transporting a wafer carrier
07/19/2001US20010008207 Sputtering alumina
07/19/2001US20010008205 Two-step ain-pvd for improved film properties
07/19/2001US20010008201 Integrated roller transport pod and asynchronous conveyor
07/19/2001US20010008174 High throughput multi-vacuum chamber system for processing wafers and method of processing wafers using the same
07/19/2001US20010008173 Plasma etching system
07/19/2001US20010008172 Semiconductor workpiece processing apparatus and method
07/19/2001US20010008171 Plasma processing apparatus for semiconductors
07/19/2001US20010008160 Method of producing electronic part with bumps and method of producing electronic part
07/19/2001US20010008154 Semiconductor wafer
07/19/2001US20010008142 Facility for treating objects in a process tank
07/19/2001US20010008140 Solution for cleaning metallized microelectronic workpieces and methods of using same
07/19/2001US20010008139 Using pulsed laser radiation
07/19/2001US20010008137 Hydrogen gas dissolving in water
07/19/2001US20010008124 Semiconductor substrate holding electrodes in groove; cooling gas
07/19/2001US20010008123 Integrated ion implant scrubber system
07/19/2001US20010008122 Plasma processing apparatus
07/19/2001US20010008117 Insulating-containing ring-shaped heat shields and support members for Czochralski pullers
07/19/2001US20010008111 Method of depositing films by using carboxylate complexes
07/19/2001US20010008052 Vacuum processing apparatus and operating method therefor
07/19/2001US20010008051 Vacuum processing apparatus and operating method therefor