| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 07/25/2001 | EP1118121A1 Semiconductor device arrangement having configuration via adjacent bond pad coding |
| 07/25/2001 | EP1118118A1 A semiconductor device |
| 07/25/2001 | EP1118116A1 Substrate with an indentation for an integrated circuit device and method for the production thereof |
| 07/25/2001 | EP1118115A1 Techniques for forming contact holes through to a silicon layer of a substrate |
| 07/25/2001 | EP1118114A1 Chuck with integrated piezoelectric sensors for wafer detection |
| 07/25/2001 | EP1118113A1 Methods and apparatus for determining an etch endpoint in a plasma processing system |
| 07/25/2001 | EP1118112A1 Method for measuring number of yield loss chips and number of poor chips by type due to defect of semiconductor chips |
| 07/25/2001 | EP1118110A1 Process for optimizing mechanical strength of nanoporous silica |
| 07/25/2001 | EP1118109A1 Silicon carbide deposition method and use as a barrier layer and passivation layer |
| 07/25/2001 | EP1118108A1 Method for the transfer of thin layers of monocrystalline material onto a desirable substrate |
| 07/25/2001 | EP1118107A1 In situ deposition of low k si carbide barrier layer, etch stop, and anti-reflective coating for damascene applications |
| 07/25/2001 | EP1118106A2 Cathode assembly containing an electrostatic chuck for retaining a wafer in a semiconductor wafer processing system |
| 07/25/2001 | EP1118105A1 Method for cleaning a process chamber |
| 07/25/2001 | EP1118104A1 Assembly device |
| 07/25/2001 | EP1118103A1 Semiconductor processing platform architecture having processing module isolation capabilities |
| 07/25/2001 | EP1118102A1 Low-pressure apparatus and pressure control valve |
| 07/25/2001 | EP1118095A1 Vacuum treatment chamber and method for treating surfaces |
| 07/25/2001 | EP1118094A1 Method and apparatus for producing a uniform density plasma above a substrate |
| 07/25/2001 | EP1118051A1 Component heater for use in semiconductor manufacturing equipment |
| 07/25/2001 | EP1118025A2 Silicon carbide for use as a low dielectric constant anti-reflective coating and its deposition method |
| 07/25/2001 | EP1118005A1 Semiconductor wafer evaluating apparatus and method |
| 07/25/2001 | EP1118002A1 Thermal isolation plate for probe card |
| 07/25/2001 | EP1117968A1 Method and apparatus for thermal processing of semiconductor substrates |
| 07/25/2001 | EP1117854A1 Method and apparatus for forming polycrystalline and amorphous silicon films |
| 07/25/2001 | EP1117850A1 Sputter deposition apparatus |
| 07/25/2001 | EP1117714A1 Water soluble positive-working photoresist composition |
| 07/25/2001 | EP1117506A1 Cmp polishing head with three chambers and method for using the same |
| 07/25/2001 | EP1078217A4 Non-destructive analysis of a semiconductor using reflectance spectrometry |
| 07/25/2001 | EP0920435A4 Platinum source compositions for chemical vapor deposition of platinum |
| 07/25/2001 | EP0904588B1 A device and method for multi-level charge/storage and reading out |
| 07/25/2001 | EP0829036B9 Lithographic scanning exposure projection apparatus |
| 07/25/2001 | EP0568239B1 Built-in self-test network |
| 07/25/2001 | CN1305662A Surface acoustic wave device package and method |
| 07/25/2001 | CN1305639A Fabrication of gallium nitride semiconductor layers by lateral growth from treach sidewalls |
| 07/25/2001 | CN1305618A Method for producing integrated circuit card and card produced according to said method |
| 07/25/2001 | CN1305608A 193 NM wavelength positive-working photoresist composition |
| 07/25/2001 | CN1305587A Process for monitoring concentration of metallic impurities in wafer cleaning solution |
| 07/25/2001 | CN1305584A Collector for automated on-line bath analysis system |
| 07/25/2001 | CN1305541A Injector for reactor |
| 07/25/2001 | CN1305393A Method and apparatus for recovery of water and slurry abrasives used for chemical and mechanical planarization |
| 07/25/2001 | CN1305339A Composite laminate and its manufacturing method |
| 07/25/2001 | CN1305234A Magnetic tunnel device, magnetic storage and element using said device and its access method |
| 07/25/2001 | CN1305231A Metallic oxide semiconductor field effect tube semiconductor device |
| 07/25/2001 | CN1305230A Tunnel transistor suitable for nonvolatile storage |
| 07/25/2001 | CN1305228A Semiconductor device |
| 07/25/2001 | CN1305227A Actire matrix display device |
| 07/25/2001 | CN1305225A Device inspection apparatus and inspection method |
| 07/25/2001 | CN1305224A Weld interface with mechanical strengthened and its method |
| 07/25/2001 | CN1305223A Method of manufacturing thin film transistor |
| 07/25/2001 | CN1305222A Method of manufacturing thin film transistor |
| 07/25/2001 | CN1305221A Stripping method for metallic electrodes of semiconductor device |
| 07/25/2001 | CN1305220A Manufacturing method of semiconductor device |
| 07/25/2001 | CN1305022A Process for preparing metallic organic matches film |
| 07/25/2001 | CN1069006C Tuning system with DC-DC converter |
| 07/25/2001 | CN1068814C Polishing pads |
| 07/24/2001 | US6266800 System and method for eliminating effects of parasitic bipolar transistor action in dynamic logic using setup time determination |
| 07/24/2001 | US6266798 Multi-power supply integrated circuit evaluation system and method of operating the same |
| 07/24/2001 | US6266389 Method for manufacturing a device, an exposure apparatus, and a method for manufacturing an exposure apparatus |
| 07/24/2001 | US6266354 Semiconductor laser device with ridge structure |
| 07/24/2001 | US6266286 Wafer burn-in test circuit and method for testing a semiconductor memory device |
| 07/24/2001 | US6266279 Nonvolatile semiconductor memory device, method for reading data from the nonvolatile semiconductor memory device, and method for writing data into the nonvolatile semiconductor memory device |
| 07/24/2001 | US6266276 Non-volatile semiconductor memory device and internal operation method for said non-volatile semiconductor memory device |
| 07/24/2001 | US6266275 Dual source side polysilicon select gate structure and programming method utilizing single tunnel oxide for nand array flash memory |
| 07/24/2001 | US6266272 Partially non-volatile dynamic random access memory formed by a plurality of single transistor cells used as DRAM cells and EPROM cells |
| 07/24/2001 | US6266268 Method for forming gate segments for an integrated circuit |
| 07/24/2001 | US6266264 Word line straps using two different layers of metal |
| 07/24/2001 | US6266251 Cavity-down ball grid array module |
| 07/24/2001 | US6266222 ESD protection network for circuit structures formed in a semiconductor |
| 07/24/2001 | US6266192 Projection exposure apparatus and device manufacturing method |
| 07/24/2001 | US6266137 Particle detecting apparatus using two light beams |
| 07/24/2001 | US6266133 Stage device, an exposure apparatus and a device manufacturing method using the same |
| 07/24/2001 | US6266130 Position detecting method and position detecting system |
| 07/24/2001 | US6266110 Uppermost metal wiring layer is formed of titan and titan nitride on which tungsten for filling a via hole can be deposited |
| 07/24/2001 | US6265831 Plasma processing method and apparatus with control of rf bias |
| 07/24/2001 | US6265806 Semiconductor microactuator with an improved platform structure and method of forming the same |
| 07/24/2001 | US6265803 Unlimited rotation vacuum isolation wire feedthrough |
| 07/24/2001 | US6265784 Resin sealed semiconductor device having improved arrangement for reducing thermal stress within the device |
| 07/24/2001 | US6265782 Semiconductor device, semiconductor chip mounting substrate, methods of manufacturing the device and substrate, adhesive, and adhesive double coated film |
| 07/24/2001 | US6265781 Methods and solutions for cleaning polished aluminum-containing layers, methods for making metallization structures, and the structures resulting from these methods |
| 07/24/2001 | US6265780 Low-potassium dielectric materials are used to form dielectric layers and etch-stop layers between the metal interconnects in the integrated circuit device; high parasite capacitance prevention |
| 07/24/2001 | US6265779 Interconnect structure comprising layers of fluorinated dielectric insulation and layers of conductive wiring patterns isolated from by one fluorine-resistant capping material |
| 07/24/2001 | US6265778 Semiconductor device with a multi-level interconnection structure |
| 07/24/2001 | US6265777 Semiconductor device with a low resistance wiring layer composed of a polysilicon and a refractory metal |
| 07/24/2001 | US6265776 Flip chip with integrated flux and underfill |
| 07/24/2001 | US6265775 Flip chip technique for chip assembly |
| 07/24/2001 | US6265770 Mounting structure of semiconductor chip, liquid crystal device, and electronic equipment |
| 07/24/2001 | US6265767 Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package |
| 07/24/2001 | US6265766 Flip chip adaptor package for bare die |
| 07/24/2001 | US6265765 Fan-out semiconductor chip assembly |
| 07/24/2001 | US6265762 Lead frame and semiconductor device using the lead frame and method of manufacturing the same |
| 07/24/2001 | US6265756 Electrostatic discharge protection device |
| 07/24/2001 | US6265755 Semiconductor integrated circuit comprising MIS capacitors |
| 07/24/2001 | US6265754 Covered slit isolation between integrated circuit devices |
| 07/24/2001 | US6265753 Imidizing and curing an oligomeric precursor compound comprising a polybenzoxazole, polybezothiazole polyamic acid ester end-capped with an aryl-substituted acetylene moiety; enhanced isotropic optical and dielectrical properties |
| 07/24/2001 | US6265751 Method and system for reducing ARC layer removal by condensing the ARC layer |
| 07/24/2001 | US6265749 Metal silicide transistor gate spaced from a semiconductor substrate by a ceramic gate dielectric having a high dielectric constant |
| 07/24/2001 | US6265748 Storage cell arrangement in which vertical MOS transistors have at least three different threshold voltages depending on stored data, and method of producing said arrangement |
| 07/24/2001 | US6265747 Semiconductor device having OHMIC connection that utilizes peak impurity concentration region |
| 07/24/2001 | US6265746 Highly resistive interconnects |
| 07/24/2001 | US6265745 Method for producing insulated gate thin film semiconductor device |