| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 07/24/2001 | US6265744 Semiconductor device having a trench structure and method for manufacturing the same |
| 07/24/2001 | US6265743 Trench type element isolation structure |
| 07/24/2001 | US6265742 Memory cell structure and fabrication |
| 07/24/2001 | US6265741 Trench capacitor with epi buried layer |
| 07/24/2001 | US6265740 Semiconductor device capacitor using a fill layer and a node on an inner surface of an opening |
| 07/24/2001 | US6265739 Non-volatile semiconductor memory device and its manufacturing method |
| 07/24/2001 | US6265738 Thin film ferroelectric capacitors having improved memory retention through the use of essentially smooth bottom electrode structures |
| 07/24/2001 | US6265735 Semiconductor device and manufacturing method thereof |
| 07/24/2001 | US6265731 Ohmic contacts for p-type wide bandgap II-VI semiconductor materials |
| 07/24/2001 | US6265730 Thin-film transistor and method of producing the same |
| 07/24/2001 | US6265729 Method for detecting and characterizing plasma-etch induced damage in an integrated circuit |
| 07/24/2001 | US6265728 Compound semiconductor device and method for controlling characteristics of the same |
| 07/24/2001 | US6265723 Magnetic shield apparatus |
| 07/24/2001 | US6265719 Inspection method and apparatus using electron beam |
| 07/24/2001 | US6265696 Heat treatment method and a heat treatment apparatus for controlling the temperature of a substrate surface |
| 07/24/2001 | US6265684 Wafer ID optical sorting system |
| 07/24/2001 | US6265673 Semiconductor element-mounting board and semiconductor device |
| 07/24/2001 | US6265660 Package stack via bottom leaded plastic (BLP) packaging |
| 07/24/2001 | US6265530 Die attach adhesives for use in microelectronic devices |
| 07/24/2001 | US6265329 Quantum deposition distribution control |
| 07/24/2001 | US6265328 Wafer edge engineering method and device |
| 07/24/2001 | US6265327 Method for forming an insulating film on semiconductor substrate surface and apparatus for carrying out the method |
| 07/24/2001 | US6265326 Method for forming thermal oxide film of silicon carbide semiconductor device |
| 07/24/2001 | US6265325 Method for fabricating dual gate dielectric layers |
| 07/24/2001 | US6265323 Substrate processing method and apparatus |
| 07/24/2001 | US6265322 Differential growth between single crystal group iii-nitride material and polycrystalline group iii-nitride material; epitaxial process |
| 07/24/2001 | US6265321 Air bridge process for forming air gaps |
| 07/24/2001 | US6265320 Method of minimizing reactive ion etch damage of organic insulating layers in semiconductor fabrication |
| 07/24/2001 | US6265319 Dual damascene method employing spin-on polymer (SOP) etch stop layer |
| 07/24/2001 | US6265318 Heating the substrate to a temperature greater than about 150 degrees c., and etching the electrode layer by employing a high density inductively coupled plasma of an etchant gas comprising chlorine, argon and bcl3, hbr, or hcl |
| 07/24/2001 | US6265317 Top corner rounding for shallow trench isolation |
| 07/24/2001 | US6265316 Etching method |
| 07/24/2001 | US6265315 Method for improving chemical/mechanical polish uniformity over rough topography for semiconductor integrated circuits |
| 07/24/2001 | US6265314 Wafer edge polish |
| 07/24/2001 | US6265313 Method of manufacturing copper interconnect |
| 07/24/2001 | US6265312 Method for depositing an integrated circuit tungsten film stack that includes a post-nucleation pump down step |
| 07/24/2001 | US6265311 High quality conformal tantalum nitride films from tantalum pentahalide precursors and nitrogen |
| 07/24/2001 | US6265310 Method of forming contact holes on a semiconductor surface |
| 07/24/2001 | US6265309 (a) a fluorine-containing compound, (b) a salt of boric acid, (c) a water-soluble organic solvent, and optionally, (d) a quaternary ammonium salt, a ammonium salt of an organic carboxylic acid or amine salt of a carboxylic acid. |
| 07/24/2001 | US6265308 Slotted damascene lines for low resistive wiring lines for integrated circuit |
| 07/24/2001 | US6265307 Fabrication method for a dual damascene structure |
| 07/24/2001 | US6265306 Resist flow method for defining openings for conductive interconnections in a dielectric layer |
| 07/24/2001 | US6265305 Method of preventing corrosion of a titanium layer in a semiconductor wafer |
| 07/24/2001 | US6265304 Controlling an etching process of multiple layers based upon thickness ratio of the dielectric layers |
| 07/24/2001 | US6265303 Integrated circuit dielectric and method |
| 07/24/2001 | US6265302 Partially recessed shallow trench isolation method for fabricating borderless contacts |
| 07/24/2001 | US6265301 Method of forming metal interconnect structures and metal via structures using photolithographic and electroplating or electro-less plating procedures |
| 07/24/2001 | US6265298 Method for forming inter-metal dielectrics |
| 07/24/2001 | US6265297 Ammonia passivation of metal gate electrodes to inhibit oxidation of metal |
| 07/24/2001 | US6265296 Method for forming self-aligned contacts using a hard mask |
| 07/24/2001 | US6265295 Method of preventing tilting over |
| 07/24/2001 | US6265294 Integrated circuit having double bottom anti-reflective coating layer |
| 07/24/2001 | US6265293 CMOS transistors fabricated in optimized RTA scheme |
| 07/24/2001 | US6265292 Method of fabrication of a novel flash integrated circuit |
| 07/24/2001 | US6265291 Circuit fabrication method which optimizes source/drain contact resistance |
| 07/24/2001 | US6265290 Method for fabricating a thin film transistor and a substrate and thin film transistor manufactured using the same |
| 07/24/2001 | US6265289 The defect density of the lateral gallium nitride semiconductor layer may be further decreased by growing a second gallium nitride semiconductor layer from the lateral gallium nitride layer. |
| 07/24/2001 | US6265288 Method of manufacturing silicon-based thin-film photoelectric conversion device |
| 07/24/2001 | US6265287 Metal-organic vapor phase epitaxy technique; supplying a group iii source gas containing indium and a group v source gas containing nitrogen; rare gas as a carrier gas into the reaction chamber so as to carry the mixed source gas |
| 07/24/2001 | US6265286 Planarization of LOCOS through recessed reoxidation techniques |
| 07/24/2001 | US6265285 Method of forming a self-aligned trench isolation |
| 07/24/2001 | US6265284 Method of manufacturing a trench isolation region in a semiconductor device |
| 07/24/2001 | US6265283 Self-aligning silicon oxynitride stack for improved isolation structure |
| 07/24/2001 | US6265282 Process for making an isolation structure |
| 07/24/2001 | US6265281 Method for forming dielectric within a recess |
| 07/24/2001 | US6265280 Method for manufacturing a cylindrical semiconductor capacitor |
| 07/24/2001 | US6265279 Method for fabricating a trench capacitor |
| 07/24/2001 | US6265278 Deep trench cell capacitor with inverting counter electrode |
| 07/24/2001 | US6265277 Method for making a bipolar transistor for the protection of an integrated circuit against electrostatic discharges |
| 07/24/2001 | US6265276 Structure and fabrication of bipolar transistor |
| 07/24/2001 | US6265275 Method of selectively doping the intrinsic collector of a vertical bipolar transistor with epitaxial base |
| 07/24/2001 | US6265274 Method of a metal oxide semiconductor on a semiconductor wafer |
| 07/24/2001 | US6265273 Method of forming rectangular shaped spacers |
| 07/24/2001 | US6265272 Method of fabricating a semiconductor device with elevated source/drain regions |
| 07/24/2001 | US6265271 Integration of the borderless contact salicide process |
| 07/24/2001 | US6265270 Method for fabricating mask ROM via medium current implanter |
| 07/24/2001 | US6265269 Method for fabricating a concave bottom oxide in a trench |
| 07/24/2001 | US6265268 High temperature oxide deposition process for fabricating an ONO floating-gate electrode in a two bit EEPROM device |
| 07/24/2001 | US6265267 Fabricating method for a semiconductor device comprising gate oxide layers of various thicknesses |
| 07/24/2001 | US6265266 Method of forming a two transistor flash EPROM cell |
| 07/24/2001 | US6265265 Flash memory cell and fabricating method thereof |
| 07/24/2001 | US6265264 Method of doping and HSG surface of a capacitor electrode with PH3 under a low temperature/high pressure processing condition |
| 07/24/2001 | US6265263 Method for forming a DRAM capacitor with porous storage node and rugged sidewalls |
| 07/24/2001 | US6265262 Semiconductor device and method of fabricating the same |
| 07/24/2001 | US6265261 Semiconductor device and fabricating method therefor in which a netride layer in a capacitor is formed in a shortened time period |
| 07/24/2001 | US6265260 Method for making an integrated circuit capacitor including tantalum pentoxide |
| 07/24/2001 | US6265259 Method to fabricate deep sub-μm CMOSFETs |
| 07/24/2001 | US6265258 Method for making a complementary metal gate electrode technology |
| 07/24/2001 | US6265257 Method of making a barrier layer to protect programmable antifuse structure from damage during fabrication sequence |
| 07/24/2001 | US6265256 MOS transistor with minimal overlap between gate and source/drain extensions |
| 07/24/2001 | US6265255 Ultra-shallow junction formation for deep sub-micron complementary metal-oxide-semiconductor |
| 07/24/2001 | US6265254 Semiconductor integrated circuit devices and a method of manufacturing the same |
| 07/24/2001 | US6265253 Aluminum disposable spacer to reduce mask count in CMOS transistor formation |
| 07/24/2001 | US6265252 Reducing the formation of electrical leakage pathways during manufacture of an electronic device |
| 07/24/2001 | US6265251 Method to fabricate a thick oxide MOS transistor for electrostatic discharge protection in an STI process |
| 07/24/2001 | US6265250 Method for forming SOI film by laser annealing |
| 07/24/2001 | US6265249 Method of manufacturing thin film transistors |
| 07/24/2001 | US6265248 Method for producing semiconductor-on-insulator structure with reduced parasitic capacitance |
| 07/24/2001 | US6265247 Thin-film transistor and manufacturing method for improved contact hole |
| 07/24/2001 | US6265245 Compliant interconnect for testing a semiconductor die |