| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 07/26/2001 | WO2001054170A1 Arrangement for supporting disklike objects in a processing system |
| 07/26/2001 | WO2001054167A2 Silicon/germanium bipolar transistor with an optimized germanium profile |
| 07/26/2001 | WO2001054058A1 Method to manufacture a smart label inlet web and a smart label inlet web |
| 07/26/2001 | WO2001054046A1 Geometric aerial image simulation |
| 07/26/2001 | WO2001054002A1 System and method for h-tree clocking layout |
| 07/26/2001 | WO2001053903A1 Bandgap voltage reference source |
| 07/26/2001 | WO2001053844A1 Hierarchical test circuit structure for chips with multiple circuit blocks |
| 07/26/2001 | WO2001053840A1 Circuit for voltage level detection |
| 07/26/2001 | WO2001053766A1 Method and device for drying substrate |
| 07/26/2001 | WO2001053569A1 Copper electroplating liquid, pretreatment liquid for copper electroplating and method of copper electroplating |
| 07/26/2001 | WO2001053565A1 Process for preparing metal nitride thin film employing amine-adduct single-source precursor |
| 07/26/2001 | WO2001053304A1 Novel aminosilyl borylalkanes, their production and use |
| 07/26/2001 | WO2001053007A1 Method for forming thin-film conductors through the decomposition of metal-chelates in association with metal particles |
| 07/26/2001 | WO2001052963A1 Apparatus and method for removing condensable aluminum vapor from aluminum etch effluent |
| 07/26/2001 | WO2001001450A3 Dram cell fabrication process and method for operating same |
| 07/26/2001 | WO2000060670A3 Integrated semiconductor device with one lateral power gate |
| 07/26/2001 | WO2000057481A3 Mos-transistor structure with a trench-gate electrode and a reduced specific closing resistor and methods for producing an mos transistor structure |
| 07/26/2001 | US20010010093 Layout design method |
| 07/26/2001 | US20010010092 Semiconductor integrated circuit with a reduced skew and layout method in design for semiconductor integrated circuit |
| 07/26/2001 | US20010010087 Method of analyzing fault occurring in semiconductor device |
| 07/26/2001 | US20010010043 Assistance method and apparatus |
| 07/26/2001 | US20010009844 Conditioner and conditioning disk for a CMP pad, and method of fabricating, reworking, and cleaning conditioning disk |
| 07/26/2001 | US20010009814 Method for removing contaminants from a semiconductor wafer |
| 07/26/2001 | US20010009813 Method for fabricating semiconductor integrated circuit device |
| 07/26/2001 | US20010009812 Process to improve adhesion of cap layers in integrated circuits |
| 07/26/2001 | US20010009811 Methods, apparatuses, and substrate assembly structures for fabricating microelectronic components using mechanical and chemical-mechanical planarization processes |
| 07/26/2001 | US20010009810 Reflowing the insulative layer to cover the laterally exposed surfaces of buffer layer, and forming a liner layer in the cavity to cover the laterally exposed surfaces of the buffer layer |
| 07/26/2001 | US20010009809 Method for forming a shallow trench isolation structure in a semiconductor device |
| 07/26/2001 | US20010009808 Raising temperature effective to transform the amorphous silicon layer into hemispherical grain polysilicon, depositing a dielectric layer over the silicon layer at the higher dielectric deposition temperature |
| 07/26/2001 | US20010009807 Forming a layer of titanium nitride on the semiconductor structure, a layer of titanium nitride on the first layer of titanium nitride and an aluminum film on the second layer of titanium nitride |
| 07/26/2001 | US20010009806 Reducing contact resistance generated on the P-type impurity area without increasing a chip size |
| 07/26/2001 | US20010009805 Borderless contact structure and method of forming the same |
| 07/26/2001 | US20010009804 Conductive layer on the insulating layer is polished to leave the conductive layer in the groove by a CMP method to form electrodes wire |
| 07/26/2001 | US20010009803 Methods for making dual-damascene dielectric structures |
| 07/26/2001 | US20010009802 Closed conductive pattern in the dielectric layer, electrically connecting the two spaced conductive patterns |
| 07/26/2001 | US20010009801 Method of making insulator for electrical structures |
| 07/26/2001 | US20010009800 Manufacture of trench-gate semiconductor devices |
| 07/26/2001 | US20010009799 Converting amorphous silicon layer into a hemispherical grained silicon film |
| 07/26/2001 | US20010009798 Isolation region forming methods |
| 07/26/2001 | US20010009797 First electrode formed on the layer of insulating material having a nodular shape, layer of a dielectric material formed on the first electrode and a second electrode formed on the layer of the dielectric material |
| 07/26/2001 | US20010009796 N-type silicon regions are implanting with a p+ type dopant through the first oxide, p-type silicon regions are implanted with an n+ type dopant through second oxide |
| 07/26/2001 | US20010009795 Simplified high Q inductor substrate |
| 07/26/2001 | US20010009794 Method and system for emitter partitioning for SiGe RF power transistors |
| 07/26/2001 | US20010009793 Bipolar transistor formed by epitaxial growth or ion implantation that has an epitaxial silicon collector layer, a base region under an emitter defined as an intrinsic base and a peripheral region defined as an outer base region |
| 07/26/2001 | US20010009792 Polysilicon inner region, bottom surface gate length beeing shorter than a gate length value of the top surface |
| 07/26/2001 | US20010009791 Forming a line of undoped semiconductive material, providing conductivity-enhancing impurity into the line and source/drain regions, rendering the undoped material of the line conductive |
| 07/26/2001 | US20010009789 Semiconductor device and manufacturing method thereof |
| 07/26/2001 | US20010009788 Layers of silicon carbide, silicon dioxide an insulating material, and a gate contact |
| 07/26/2001 | US20010009787 Method for forming a bottom electrode of a storage capacitor |
| 07/26/2001 | US20010009786 Contact is evenly formed and the area of the cell array region is reduced, thereby enabling cells to be packed on a chip with high density |
| 07/26/2001 | US20010009785 Forming n-type drain region in n-type silicon region, forming n-type source region in n-type silicon region, forming dielectric layer on n-type silicon region, forming a p-type polysilicon gate on dielectric layer |
| 07/26/2001 | US20010009784 Preparing substrate, isolating active region, depositing gate oxide, depositing first and second selective etchable layers over gate oxide layer, etching to undercut first etchable layer, implanting ions, etching, depositing oxide, metallizing |
| 07/26/2001 | US20010009783 Semiconductor device and fabrication method thereof |
| 07/26/2001 | US20010009780 Semiconductor device and process for fabrication thereof |
| 07/26/2001 | US20010009779 Circuit chip package and fabrication method |
| 07/26/2001 | US20010009778 Method for applying viscous material to lead frame, comprising forming film of viscous material on carrier surface and bringing portion of lead frame and film of viscous material into contact with one another |
| 07/26/2001 | US20010009777 Forming patterned masking layer over wafer layer, removing uncovered portions of wafer layer using patterned masking layer to leave first raised structure and sacrificial raised structure in the side substrate region, etching |
| 07/26/2001 | US20010009775 Semiconductor substrate, gate insulating film formed on surface of semiconductor substrate, tunnel insulating film obtained by forming portion of gate insulating film into thin layer, floating gate formed on gate insulating film |
| 07/26/2001 | US20010009749 Comprising polyhydroxystyrene protected by 1-ethoxyethanol, photosensitive acid generator, solvent and polystyrene filler; dimensional and shape control of semiconductors; responsive to design rule of <0.15mu m; miniaturization |
| 07/26/2001 | US20010009746 Adding a dissolution inhibitor to a polymer soluble in an aqueous alkaline developer and a quinonediazide photosensitizer to increase the solubility difference between the exposed and unexposed parts; fineness; resolution; films |
| 07/26/2001 | US20010009745 Half tone phase shift mask having a stepped aperture |
| 07/26/2001 | US20010009724 Depositing coating on elongate member to give a coated elongate member, coating comprising at least one metal and at least one additive, the additive capable of codepositing with the metal, heat treating; electronics packaging |
| 07/26/2001 | US20010009641 Substrate detecting method and device |
| 07/26/2001 | US20010009559 Narrow beam ArF excimer laser device |
| 07/26/2001 | US20010009527 Semiconductor memory device |
| 07/26/2001 | US20010009524 Semiconductor device having a test circuit |
| 07/26/2001 | US20010009519 Dynamic ram and semiconductor device |
| 07/26/2001 | US20010009497 Electrostatically attracting electrode and a method of manufacture thereof |
| 07/26/2001 | US20010009459 Method and apparatus employing external light source for endpoint detection |
| 07/26/2001 | US20010009455 Exposure apparatus |
| 07/26/2001 | US20010009452 Developing method and developing unit |
| 07/26/2001 | US20010009381 Semiconductor integrated circuit and method of designing the same |
| 07/26/2001 | US20010009378 Probe holder for low current measurements |
| 07/26/2001 | US20010009377 Wafer probe station for low-current measurements |
| 07/26/2001 | US20010009376 Probe arrangement assembly, method of manufacturing probe arrangement assembly, probe mounting method using probe arrangement assembly, and probe mounting apparatus |
| 07/26/2001 | US20010009342 Electronic component and method of production thereof |
| 07/26/2001 | US20010009305 Microelectronic elements with deformable leads |
| 07/26/2001 | US20010009304 Semiconductor device |
| 07/26/2001 | US20010009303 Local interconnect structures for integrated circuits and methods for making the same |
| 07/26/2001 | US20010009301 Semiconductor devices having different package sizes made by using common parts |
| 07/26/2001 | US20010009300 Semiconductor element having external connection terminals, method of manufacturing the semiconductor element, and semiconductor device equipped with the semiconductor element |
| 07/26/2001 | US20010009298 Chip scale surface mount packages for semiconductor device |
| 07/26/2001 | US20010009297 Bonding pad on a semiconductor chip |
| 07/26/2001 | US20010009296 Process for forming an integrated circuit |
| 07/26/2001 | US20010009295 Semiconductor device and process for producing the same |
| 07/26/2001 | US20010009294 Method of forming an alignment key on a semiconductor wafer |
| 07/26/2001 | US20010009293 Encapped oligomeric polybenzoxazole, polybenzothiazole, polyamic acid or polyamic acid esters as precursors for dielectric compounds |
| 07/26/2001 | US20010009292 Semiconductor device and method of manufacturing the same |
| 07/26/2001 | US20010009291 Semiconductor structure having reduced silicide resistance between closely spaced gates and method of fabrication |
| 07/26/2001 | US20010009290 Buried guard rings and method for forming the same |
| 07/26/2001 | US20010009289 Flash memory device and fabrication method thereof |
| 07/26/2001 | US20010009288 Semiconductor device and method of fabricating the same |
| 07/26/2001 | US20010009286 Method of forming a capacitor |
| 07/26/2001 | US20010009285 Semiconductor memory device and method of manufacturing same |
| 07/26/2001 | US20010009284 Bottom electrode of capacitor and fabricating method thereof |
| 07/26/2001 | US20010009283 Semiconductor device and method of manufacturing the semiconductor device |
| 07/26/2001 | US20010009282 Semiconductor device which includes a capacitor having a lower electrode formed of iridium or ruthenium |
| 07/26/2001 | US20010009281 Phase shift mask and fabrication method thereof |
| 07/26/2001 | US20010009279 Semiconductor device and manufacturing method of the same |
| 07/26/2001 | US20010009277 Structure and method for reinforcing a semiconductor device to prevent cracking |