Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2002
01/10/2002WO2002002003A1 Apparatus and method for measuring selected physical condition of an animate subject
01/10/2002WO2001084623A9 Hot plate unit and semiconductor manufacturing and inspecting device
01/10/2002WO2001074051A3 Single-button remote access to a synthetic channel page of specialized content
01/10/2002WO2001069654A3 Semiconductor device with light shield and corresponding etching method
01/10/2002WO2001055952A9 Method and system for collecting and transmitting chemical information
01/10/2002WO2001050523A3 Method to measure alignment using latent image grating structures
01/10/2002WO2001050109A3 Wafer band-edge measurement using spectroscopy and a process of uniform wafer temperature control
01/10/2002WO2001043187A3 Removal of silicon oxynitride material using a wet chemical process after gate etch processing
01/10/2002WO2001039251A3 High performance output buffer with esd protection
01/10/2002WO2001038603A3 Metallizing method for dielectrics
01/10/2002WO2001036990A3 Wafer level interposer
01/10/2002WO2001033613A3 Removal of photoresist and residue from substrate using supercritical carbon dioxide process
01/10/2002WO2001032958A3 Multilayer metal composite structures for semiconductor circuitry and method of manufacture
01/10/2002WO2001031685A3 InPSb/InAs BJT DEVICE AND METHOD OF MAKING
01/10/2002WO2001015217A3 Method for producing a semiconductor chip with an electrical property that can be adjusted after the silicon process
01/10/2002WO2000055903A9 Methods for reducing semiconductor contact resistance
01/10/2002WO2000019490A3 Dummy fill cell for reducing layer-to-layer interaction
01/10/2002US20020004930 Semiconductor device having definite size of input/output blocks and its designing method
01/10/2002US20020004929 Method of designing a layout of an LSI chip, and a computer product
01/10/2002US20020004928 Interactive method of optimum lsi layout including considering lsi chip size, test element groups, and alignment marks
01/10/2002US20020004927 Method for designing ingegrated circuit
01/10/2002US20020004875 Memory device
01/10/2002US20020004687 Method and subsystem for determining a sequence in which microstructures are to be processed at a laser-processing site
01/10/2002US20020004686 Apparatus, method, program, and data structure for assisting placing order for manufacturing semiconductor device
01/10/2002US20020004570 Polymer and photoresist compositions
01/10/2002US20020004361 Wafer polishing apparatus
01/10/2002US20020004360 Polishing slurry
01/10/2002US20020004359 Semiconductor wafer grinding Method
01/10/2002US20020004358 Cluster tool systems and methods to eliminate wafer waviness during grinding
01/10/2002US20020004320 Attaratus for socketably receiving interconnection elements of an electronic component
01/10/2002US20020004318 System and method for selectively increasing surface temperature of an object
01/10/2002US20020004317 Ceria based slurry for chemical-mechanical polishing
01/10/2002US20020004316 Method of fabricating silica microstructures
01/10/2002US20020004315 Method for fabricating semiconductor integrated circuit device
01/10/2002US20020004314 Semiconductor device and method for manufacturing the same
01/10/2002US20020004313 Method for manufacturing gate structure for use in semiconductor device
01/10/2002US20020004311 Method for forming shallow trench isolations
01/10/2002US20020004310 Method of prefilling of keyhole at the top metal level with photoresist to prevent passivation damage even for a severe top metal rule and device manufactured thereby
01/10/2002US20020004309 Processes used in an inductively coupled plasma reactor
01/10/2002US20020004308 Plasmaless dry contact cleaning method using interhalogen compounds
01/10/2002US20020004306 Coaxial dressing for chemical mechanical polishing
01/10/2002US20020004305 Semiconductor Wafer Manufacturing Process
01/10/2002US20020004304 Technique for elimination of pitting on silicon substrate during gate stack etch
01/10/2002US20020004303 Wet cleans for cobalt disilicide processing
01/10/2002US20020004302 Method for fabricating semiconductor device
01/10/2002US20020004301 Submicron metallization using electrochemical deposition
01/10/2002US20020004300 Semiconductors
01/10/2002US20020004299 Method of fabricating a contract structure having a composite barrier layer between a platinium layer and a polysilicon plug
01/10/2002US20020004298 Method of forming interlayer insulating film
01/10/2002US20020004297 Advance metallization process
01/10/2002US20020004294 Dopant diffusion-retarding barrier region formed within polysilicon gate layer
01/10/2002US20020004293 Method of growing electrical conductors
01/10/2002US20020004292 Laser apparatus, laser annealing method, and manufacturing method of a semiconductor device
01/10/2002US20020004291 Method of manufacturing a semiconductor device
01/10/2002US20020004290 Formation of 5F2 cell with partially vertical transistor and gate conductor aligned buried strap with raised shallow trench isolation region
01/10/2002US20020004289 Semiconductor device manufacturing method
01/10/2002US20020004288 Chip-like electronic components, a method of manufacturing the same, a pseudo wafer therefor and a method of manufacturing thereof
01/10/2002US20020004287 Thin silicon circuits and method for making the same
01/10/2002US20020004286 Soi substrate and method and system for manufacturing the same
01/10/2002US20020004285 Stress-free shallow trench isolation
01/10/2002US20020004284 Method for forming a shallow trench isolation structure including a dummy pattern in the wider trench
01/10/2002US20020004283 Method of forming an alignment feature in or on a multi-layered semiconductor structure
01/10/2002US20020004282 Method of forming a trench isolation structure comprising annealing the oxidation barrier layer thereof in a furnace
01/10/2002US20020004281 Trench isolation method
01/10/2002US20020004280 Method of forming storage nodes in a dram
01/10/2002US20020004279 Capacitor forming methods and capacitor constructions
01/10/2002US20020004278 Memory cell with a stacked capacitor
01/10/2002US20020004277 Structure and method for dual gate oxide thicknesses
01/10/2002US20020004276 Structure and method for dual gate oxide thicknesses
01/10/2002US20020004275 Semiconductor device and method of manufacturing the same
01/10/2002US20020004274 Method of fabricating semiconductor device
01/10/2002US20020004273 Improved process for forming a storage electrode
01/10/2002US20020004272 Multiple step methods for forming comformal layers
01/10/2002US20020004271 Memory cell with trench capacitor and method of fabricating the memory cell
01/10/2002US20020004270 Semiconductor device and method of manufacturing the same
01/10/2002US20020004269 Semiconductor device manufacturing method and semiconductor device
01/10/2002US20020004268 Method of polishing polysilicon
01/10/2002US20020004266 Apparatus and method for forming thin film at low temperature and high deposition rate
01/10/2002US20020004265 Grind polish cluster and methods to remove visual grind pattern
01/10/2002US20020004264 Method for fabricating a simplified CMOS polysilicon thin film transistor and resulting structure
01/10/2002US20020004263 Process for producing semiconductor integrated circuit device and semiconductor integrated circuit device
01/10/2002US20020004262 Using mixture of silane and hydrogen; catalytic crystallization
01/10/2002US20020004261 Manufacturing method for semiconductor device
01/10/2002US20020004260 Thin film transistor manufacturing method and thin film transistor
01/10/2002US20020004259 Semicondctor device with multi-level interconnect having embedded loe dielectric constant layer and process for making same
01/10/2002US20020004258 A pendulum motor having a stator and a cantilever beam moveable by an electrostatic force to predetermined positions relative to a supporting structure. A micro electro mechanical system (MEMS) mechanism is formed on a
01/10/2002US20020004253 Quantum well intermixing
01/10/2002US20020004252 Method for manufacturing light-emitting device using a group III nitride compound semiconductor
01/10/2002US20020004250 Semiconductor device manufacturing method
01/10/2002US20020004249 Semiconductor memory device and manufacturing method thereof
01/10/2002US20020004248 Ferroelectric memory devices including patterned conductive layers
01/10/2002US20020004181 Microminiaturization semiconductors, integrated circuits
01/10/2002US20020004177 Photosensitive resin composition
01/10/2002US20020004173 Cutting, flattening silicon oxyfluoride glass tube
01/10/2002US20020004167 Device enclosures and devices with integrated battery
01/10/2002US20020004139 Vapor deposition; overcoating semiconductor substrate
01/10/2002US20020004134 Adhesive sheet and electrostatic chucking device
01/10/2002US20020004100 Method of uniformly coating a substrate
01/10/2002US20020003994 Component source interchange gantry
01/10/2002US20020003918 Quantum well intermixing