Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2002
02/28/2002WO2001066834A3 Chemical vapor deposition process for fabricating layered superlattice materials
02/28/2002WO2001065599A3 Nitride layer forming methods
02/28/2002WO2001063668A3 Method of forming lead-free solder alloys by electrochemical deposition process
02/28/2002WO2001059828A3 Building component with constant distorsion-free bonding, and method for bonding
02/28/2002WO2001055478A3 Method and device for depositing a precursor on a substrate, said precursor being present in liquid form
02/28/2002WO2001054183A3 Method to prevent oxygen out-diffusion from basrtio3 containing micro-electronic device
02/28/2002WO2001041963A3 Systems and methods for application of atmospheric plasma surface treatment to various electronic component packaging and assembly methods
02/28/2002WO2001039248A3 Contact for a trench capacitor of a dram cell arrangement
02/28/2002WO2001037342A3 Dram cell structure with tunnel barrier
02/28/2002WO2001031698A3 Method for thermally treating semiconductor substrates
02/28/2002WO2000077830A8 A method for the preparation of an epitaxial silicon wafer with intrinsic gettering
02/28/2002US20020026628 Pattern defect checking method and device
02/28/2002US20020026627 Streamlined IC mask layout optical and process correction through correction reuse
02/28/2002US20020026625 Method for dividing a terminal in automatic interconnect routing processing, a computer program for implementing same, and an automatic interconnect routing processor using the method
02/28/2002US20020026624 Correction of layout pattern data during semiconductor patterning process
02/28/2002US20020026623 Semiconductor Integrated circuit provided with determination circuit
02/28/2002US20020026621 Method of layout compaction
02/28/2002US20020026612 Apparatus for testing semiconductor integrated circuits
02/28/2002US20020026263 Method of monitoring manufacturing apparatus
02/28/2002US20020026260 Exposure apparatus
02/28/2002US20020026259 Method of transporting substrates and apparatus for transporting substrates
02/28/2002US20020026258 Method and apparatus for testing IC device
02/28/2002US20020026251 System and method for monitoring and controlling gas plasma processes
02/28/2002US20020026022 Resist compositions containing polymers having dialkyl malonate groups for use in chemically amplified resists
02/28/2002US20020025763 Methods and apparatus for electrical, mechanical and/or chemical removal of conductive material from a microelectronic substrate
02/28/2002US20020025761 Chemical mechanical polishing machine and chemical mechanical polishing method
02/28/2002US20020025760 Methods and apparatus for electrically and/or chemically-mechanically removing conductive material from a microelectronic substrate
02/28/2002US20020025759 Microelectronic substrate having conductive material with blunt cornered apertures, and associated methods for removing conductive material
02/28/2002US20020025694 Device and method for protecting against oxidation of a conductive layer in said device
02/28/2002US20020025693 Method of manufacturing low dielectric film by a vacuum ultraviolet chemical vapor deposition
02/28/2002US20020025692 Use of linear injectors to deposit uniform selective ozone TEOS oxide film by pulsing reactants on and off
02/28/2002US20020025691 Flash memory device and a fabrication process thereof, method of forming a dielectric film
02/28/2002US20020025690 Semiconductor device and method for manufacturing same
02/28/2002US20020025689 Method of improving surface planarity of chemical-mechanical polishing operation by forming shallow dummy
02/28/2002US20020025688 Heat-processing apparatus and method of semiconductor process
02/28/2002US20020025687 Method and apparatus for selective removal of material from wafer alignment marks
02/28/2002US20020025686 Apparatus and method for plasma processing high-speed semiconductor circuits with increased yield
02/28/2002US20020025685 Endpoint control for small open area by RF source parameter Vdc
02/28/2002US20020025684 Etching silicon oxide surface using anhydrous fluorine gas
02/28/2002US20020025683 Etching gas used for plasma-enhanced etching of vanadium oxide film and method of plasma-enhanced etching of vanadium oxide film
02/28/2002US20020025681 Semiconductor etching apparatus and method of etching semiconductor devices using same
02/28/2002US20020025680 Methods of etching insulative materials, of forming electrical devices, and of forming capacitors
02/28/2002US20020025679 Process for fabricating semiconductor device
02/28/2002US20020025678 Method for reducing thermal budget in node contact application
02/28/2002US20020025677 Dry etching method and apparatus
02/28/2002US20020025676 Salicide formation process
02/28/2002US20020025675 Electronic devices with diffusion barrier and process for making same
02/28/2002US20020025674 Manufacturing method of semiconductor device
02/28/2002US20020025673 Method for forming gate by using Co-silicide
02/28/2002US20020025672 Method for forming an integrated circuit interconnect using a dual poly process
02/28/2002US20020025671 Method of manufacturing a metal line in a semiconductor device
02/28/2002US20020025670 Method of manufacturing a semiconductor device
02/28/2002US20020025669 Methods of forming a contact structure in a semiconductor device
02/28/2002US20020025668 Wiring pattern formation method and original substrate used for the method
02/28/2002US20020025667 Method of forming overmolded chip scale package and resulting product
02/28/2002US20020025666 Use of selective ozone teos oxide to create variable thickness layers and spacers
02/28/2002US20020025665 Method of forming a metal to polysilicon contact in oxygen environment
02/28/2002US20020025664 Process for production of gate electrode and gate electrode structure
02/28/2002US20020025663 Method of manufacturing semiconductor device of dual-gate construction, and semiconductor device manufactured thereby
02/28/2002US20020025662 Semiconductor device and method for fabricating the same
02/28/2002US20020025661 Multilayers of various electroconductivity; vapor deposition
02/28/2002US20020025660 Growth of epitaxial semiconductor material with improved crystallographic properties
02/28/2002US20020025659 Method for crystallizing semiconductor material without exposing it to air
02/28/2002US20020025658 Method for forming a barrier layer
02/28/2002US20020025657 Wafer processing in a chamber with novel gas inlets
02/28/2002US20020025656 Semiconductor chip pick-up method
02/28/2002US20020025655 Semiconductor device and manufacturing method thereof
02/28/2002US20020025654 Method for manufacturing a semiconductor device
02/28/2002US20020025653 Method of forming multilevel interconnection structure having an air gap between interconnects
02/28/2002US20020025652 Method and apparatus for processing composite member
02/28/2002US20020025651 Semiconductor device manufacturing method and semiconductor manufacturing apparatus
02/28/2002US20020025650 Methods for enhancing capacitors having roughened features to increase charge-storage capacity
02/28/2002US20020025649 Method of manufacturing a capacitor in a semiconductor device
02/28/2002US20020025648 Method for manufacturing a capacitor for use in a semiconductor device
02/28/2002US20020025647 Device formation method for preventing pattern shift caused by glass layer reflow
02/28/2002US20020025646 Method for forming capacitor of semiconductor device
02/28/2002US20020025645 Method for manufacturing buried layer with low sheet resistence and structure formed thereby
02/28/2002US20020025644 Structures comprising transistor gates
02/28/2002US20020025643 Method for using thin spacers and oxidation in gate oxides
02/28/2002US20020025642 Method for using thin spacers and oxidation in gate oxides
02/28/2002US20020025641 Method for fabricating a MOSFET and a MOSFET
02/28/2002US20020025639 Method for fabricating abrupt source/drain extensions with controllable gate electrode overlap
02/28/2002US20020025638 Reducing lithography limitation by reverse-offset spacer process
02/28/2002US20020025637 Method for manufacturing self-matching transistor
02/28/2002US20020025636 Field effect transitor with non-floating body and method for forming same on a bulk silicon wafer
02/28/2002US20020025635 Method for fabricating connection structure between segment transistor and memory cell region of flash memory device
02/28/2002US20020025634 Method for fabricating MOS transistor using selective silicide process
02/28/2002US20020025633 MOSFET gate insulating film and method of manufacturing the same
02/28/2002US20020025632 Process for fabricating semiconductor device and photolithography mask
02/28/2002US20020025631 Process for manufacturing a non-volatile memory cell with a floating gate region autoaligned to the isolation and with a high coupling coefficient
02/28/2002US20020025630 Semiconductor device and method for manufacturing the device
02/28/2002US20020025629 Method of fabricating a capacitor structure
02/28/2002US20020025628 Capacitor fabrication methods and capacitor constructions
02/28/2002US20020025627 Integrated circuits
02/28/2002US20020025626 Forming barriers
02/28/2002US20020025625 Mixed oxides, nitrides
02/28/2002US20020025624 Method for manufacturing capacitor for use in semiconductor device
02/28/2002US20020025623 Semiconductor device, manufacturing method therefor, and thin film capacitor
02/28/2002US20020025622 Low leakage capacitance isolation material
02/28/2002US20020025621 Radical cell device and method for manufacturing groups II-VI compound semiconductor device