Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2002
03/05/2002US6353259 Process for producing BGA type semiconductor device, TAB tape for BGA type semiconductor device, and BGA type semiconductor device
03/05/2002US6353255 Semiconductor device and manufacturing method thereof
03/05/2002US6353254 Device isolation structure and device isolation method for a semiconductor power integrated circuit
03/05/2002US6353253 Semiconductor isolation region bounded by a trench and covered with an oxide to improve planarization
03/05/2002US6353252 High breakdown voltage semiconductor device having trenched film connected to electrodes
03/05/2002US6353251 MOS gate Schottky tunnel transistor and an integrated circuit using the same
03/05/2002US6353249 MOSFET with high dielectric constant gate insulator and minimum overlap capacitance
03/05/2002US6353248 Optimized decoupling capacitor using lithographic dummy filler
03/05/2002US6353246 Semiconductor device including dislocation in merged SOI/DRAM chips
03/05/2002US6353245 Body-tied-to-source partially depleted SOI MOSFET
03/05/2002US6353243 Process for manufacturing an integrated circuit comprising an array of memory cells
03/05/2002US6353242 Nonvolatile semiconductor memory
03/05/2002US6353241 Memory circuitry with spaced conductive lines of different elevational thickness
03/05/2002US6353239 Semiconductor integrated circuit device
03/05/2002US6353235 Plasma damage detector and plasma damage evaluation method
03/05/2002US6353231 Pinhole detector for electron intensity distribution
03/05/2002US6353218 Laser illumination apparatus with beam dividing and combining performances
03/05/2002US6353210 Correction of wafer temperature drift in a plasma reactor based upon continuous wafer temperature measurements using and in-situ wafer temperature optical probe
03/05/2002US6353209 Temperature processing module
03/05/2002US6353206 Plasma system with a balanced source
03/05/2002US6353202 Apparatus and method for producing a chip-substrate connection
03/05/2002US6353201 Discharge electrode, RF plasma generation apparatus using the same, and power supply method
03/05/2002US6353189 Wiring board, wiring board fabrication method, and semiconductor package
03/05/2002US6353182 Proper choice of the encapsulant volumetric CTE for different PGBA substrates
03/05/2002US6352946 High-pressure anneal process for integrated circuits
03/05/2002US6352945 Introducing silicon compound having two alkoxy groups or less with no additive gas into reaction chamber for plasma chemical vapor deposition containing semiconductor substrate, activating plasma polymerization to form silicone film
03/05/2002US6352944 Positioning semiconductor substrate within chemical vapor deposition reactor, feeding ammonia and trialkylaluminum compound to reactor at specified temperature and pressure to deposit layer comprising amorphous aluminum nitride
03/05/2002US6352943 Method of film formation and method for manufacturing semiconductor device
03/05/2002US6352942 Exposing silicon layer on germanium layer to dry oxygen gas at exposure temperature sufficient to induce oxidation of silicon layer substantially only by thermal energy, for time selected to oxidize only portion of silicon layer
03/05/2002US6352941 Controllable oxidation technique for high quality ultrathin gate oxide formation
03/05/2002US6352940 Semiconductor passivation deposition process for interfacial adhesion
03/05/2002US6352939 Method for improving the electrical properties of a gate oxide
03/05/2002US6352938 Method of removing photoresist and reducing native oxide in dual damascene copper process
03/05/2002US6352937 Generating radicals in gas mainly composed of fluorine-based gas, stripping organic film formed on layered unit having organic low dielectric constant insulating film with radicals
03/05/2002US6352936 Method for stripping ion implanted photoresist layer
03/05/2002US6352935 Method of forming a cover cap for semiconductor wafer devices
03/05/2002US6352934 Sidewall oxide process for improved shallow junction formation in support region
03/05/2002US6352933 Methods of forming insulating materials between conductive components and methods of forming insulating materials around a conductive component
03/05/2002US6352932 Methods of forming integrated circuitry and integrated circuitry structures
03/05/2002US6352931 Manufacturing method of semiconductor devices by using dry etching technology
03/05/2002US6352930 Bilayer anti-reflective coating and etch hard mask
03/05/2002US6352928 Method of forming trench isolation
03/05/2002US6352927 Semiconductor wafer and method for fabrication thereof
03/05/2002US6352926 Structure for improving low temperature copper reflow in semiconductor features
03/05/2002US6352924 Removing first tungsten plug from contact opening, removing top surface layer of titanium nitride glue layer by sputter etching, depositing new thin layer of titanium nitride over glue layer, re-depositing second tungsten plug in opening
03/05/2002US6352923 Method of fabricating direct contact through hole type
03/05/2002US6352922 Method of fabrication of a semiconductor device having a double layer type anti-reflective layer
03/05/2002US6352921 Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallization
03/05/2002US6352920 Process of manufacturing semiconductor device
03/05/2002US6352919 Method of fabricating a borderless via
03/05/2002US6352918 Method of forming inter-metal interconnection
03/05/2002US6352917 Reversed damascene process for multiple level metal interconnects
03/05/2002US6352916 Method of forming plugs in multi-level interconnect structures by partially removing conductive material from a trench
03/05/2002US6352915 Method for manufacturing semiconductor package containing cylindrical type bump grid array
03/05/2002US6352913 Damascene process for MOSFET fabrication
03/05/2002US6352912 Prior to formation of gate, blanket implanting neutral dopant into semiconductor substrate at energy dose sufficient to implant dopant at depth greater than that of diffusion regions, forming peak concentration at specified depth
03/05/2002US6352910 Method of depositing amorphous silicon based films having controlled conductivity
03/05/2002US6352909 Process for lift-off of a layer from a substrate
03/05/2002US6352908 Method for reducing nitride residue in a LOCOS isolation area
03/05/2002US6352907 Method for manufacturing bipolar devices with a self-aligned base-emitter junction
03/05/2002US6352906 Nitridization of STI sidewalls
03/05/2002US6352905 Method and structure of high and low K buried oxide for SOI technology
03/05/2002US6352903 Junction isolation
03/05/2002US6352902 Process of forming a capacitor on a substrate
03/05/2002US6352901 Method of fabricating a bipolar junction transistor using multiple selectively implanted collector regions
03/05/2002US6352900 Controlled oxide growth over polysilicon gates for improved transistor characteristics
03/05/2002US6352899 Raised silicide source/drain MOS transistors having enlarged source/drain contact regions and method
03/05/2002US6352898 Method of manufacturing a semiconductor memory device incorporating a capacitor therein
03/05/2002US6352897 Method of improving edge recess problem of shallow trench isolation
03/05/2002US6352896 Method of manufacturing DRAM capacitor
03/05/2002US6352895 Method of forming merged self-aligned source and ONO capacitor for split gate non-volatile memory
03/05/2002US6352894 Method of forming DRAM cell arrangement
03/05/2002US6352893 Low temperature self-aligned collar formation
03/05/2002US6352892 Method of making DRAM trench capacitor
03/05/2002US6352891 Method of manufacturing semiconductor device in which hot carrier resistance can be improved and silicide layer can be formed with high reliability
03/05/2002US6352890 Method of forming a memory cell with self-aligned contacts
03/05/2002US6352889 Method for fabricating capacitor and method for fabricating semiconductor device
03/05/2002US6352888 Method of fabricating SRAM cell having a field region
03/05/2002US6352887 Merged bipolar and CMOS circuit and method
03/05/2002US6352885 Transistor having a peripherally increased gate insulation thickness and a method of fabricating the same
03/05/2002US6352884 Method for growing crystals having impurities and crystals prepared thereby
03/05/2002US6352883 Semiconductor device and method for forming the same
03/05/2002US6352882 Silicon-on-insulator structure for electrostatic discharge protection and improved heat dissipation
03/05/2002US6352881 Method and apparatus for forming an underfill adhesive layer
03/05/2002US6352879 Semiconductor device and method of manufacturing the same
03/05/2002US6352878 Method for molding a bumped wafer
03/05/2002US6352877 Metal layer in semiconductor device and method for fabricating the same
03/05/2002US6352872 SOI device with double gate and method for fabricating the same
03/05/2002US6352870 Method of endpointing plasma strip process by measuring wafer temperature
03/05/2002US6352867 Method of controlling feature dimensions based upon etch chemistry concentrations
03/05/2002US6352866 Method for improving the sidewall stoichiometry of thin film capacitors
03/05/2002US6352865 Method for fabricating a capacitor for a semiconductor device
03/05/2002US6352864 Single transistor cell, method for manufacturing the same, memory circuit composed of single transistors cells, and method for driving the same
03/05/2002US6352817 Methodology for mitigating formation of t-tops in photoresist
03/05/2002US6352813 Acrylic polymer
03/05/2002US6352803 Mask substrate including single layer substrate composed of low thermal expansion material, at least one layer of material on front side of substrate, at least one layer of material on back side of substrate
03/05/2002US6352802 Mask for electron beam exposure and method of manufacturing semiconductor device using the same
03/05/2002US6352801 Mask comprising phase shifter constructed of gadolinium gallium garnet serving as second light transmissive region formed on substrate which is transmissive to exposure light
03/05/2002US6352800 Reticle for use in exposing semiconductor, method of producing the reticle, and semiconductor device
03/05/2002US6352743 Semiconductor copper band pad surface protection