Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2002
03/14/2002WO2002021588A1 Process for producing organic film by coevaporation
03/14/2002WO2002021587A1 Semiconductor device and method of manufacturing the semiconductor device
03/14/2002WO2002021586A1 Dry etching gas and method for dry etching
03/14/2002WO2002021584A1 Selective growth of semiconductor structure
03/14/2002WO2002021581A2 Method for uniform polish microelectronic device
03/14/2002WO2002021580A2 Portable enclosure for semiconductor processing
03/14/2002WO2002021579A1 Wafer clamping apparatus and method
03/14/2002WO2002021577A2 Wafer carrier
03/14/2002WO2002021576A2 Organic nanoelectric conductors
03/14/2002WO2002021574A2 Subframe method for displaying grey scales on an active matrix el device with subdivided msb subframe
03/14/2002WO2002021573A2 Ccd image sensor and method of manufacturing same
03/14/2002WO2002021565A2 Apparatus for magnetically scanning and/or switching a charged-particle beam
03/14/2002WO2002021241A2 Circuit arrangement and a method for detecting an undesired attack on an integrated circuit
03/14/2002WO2002021228A1 Self-diagnosis circuit of input/output circuit system
03/14/2002WO2002021217A1 Vacuum ultraviolet transmitting direct deposit vitrified silicon oxyfluoride lithography glass photomask blanks
03/14/2002WO2002021210A1 Halftone phase shift photomask and blank for halftone phase shift photomask
03/14/2002WO2002021111A1 Apparatus for inspecting wafer surface, method for inspecting wafer surface, apparatus for judging defective wafer, method for judging defective wafer, and apparatus for processing information on wafer surface
03/14/2002WO2002021075A1 Determination of center of focus by diffraction signature analysis
03/14/2002WO2002020882A1 Silicon sheet producing apparatus and solar cell comprising silicon sheet produced by the same
03/14/2002WO2002020881A2 Apparatus and method for cleaning a bell jar in a barrel epitaxial reactor
03/14/2002WO2002020880A1 Production of low defect epitaxial films
03/14/2002WO2002020876A2 Segmenting of processing system into wet and dry areas
03/14/2002WO2002020871A1 Plasma boat
03/14/2002WO2002020864A2 System and method for depositing high dielectric constant materials and compatible conductive materials
03/14/2002WO2002020236A2 A mold
03/14/2002WO2002005315A3 System and method for improving thin films by gas cluster ion be am processing
03/14/2002WO2001082339A3 Method and device for the wet-chemical removal of layers and for cleaning plate-shaped individual substrates
03/14/2002WO2001075932A3 An enhanced resist strip in a dielectric etcher using downstream plasma
03/14/2002WO2001073830A3 Electrochemical nanostructuring method and device
03/14/2002WO2001071796A3 Method for electrochemical polishing of a conductive material
03/14/2002WO2001071779A3 Method and apparatus for planarizing a semiconductor contactor
03/14/2002WO2001069658A3 One-time programmable anti-fuse element and method
03/14/2002WO2001069656A3 Localized heating and cooling of substrates
03/14/2002WO2001067071A3 Evaluating a property of a multilayered structure
03/14/2002WO2001065594A3 A method of producing a schottky varicap diode
03/14/2002WO2001063644A3 Method for producing bipolar transistors in a bicmos process
03/14/2002WO2001046987A3 Inkjet-fabricated integrated circuits
03/14/2002WO2001045135A3 Plasma reactor cooled ceiling with an array of thermally isolated plasma heated mini-gas distribution plates
03/14/2002WO2001043165A3 Oxide films containing p-type dopant and process for preparing same
03/14/2002WO2001042694A3 Distribution system of modular process lines
03/14/2002WO2001027695A3 Removable cover for protecting a reticle, system including and method of using the same
03/14/2002WO2000065126A9 Cvd tantalum nitride plug formation from tantalum halide precursors
03/14/2002WO2000057629A9 Laser pattern generator
03/14/2002WO2000052746A9 A system and method for residue entrapment utilizing a polish and sacrificial fill for semiconductor fabrication
03/14/2002US20020032899 Method and apparatus for modifying flattened data of designed circuit pattern
03/14/2002US20020032897 Method of designing wiring for power sources in a semiconductor chip, and a computer product
03/14/2002US20020032896 Circuit design method and circuit design apparatus
03/14/2002US20020032895 Optimization of a logic circuit having a hierarchical structure
03/14/2002US20020032888 System and method for determining yield impact for semiconductor devices
03/14/2002US20020032499 Tuning electrodes used in a reactor for electrochemically processing a microelectronic workpiece
03/14/2002US20020032496 Transport device
03/14/2002US20020032493 Production process standardization system of semiconductor device and method of same and storage medium storing that method
03/14/2002US20020032280 One-part, thermally-curable adhesive composition comprising: an epoxy resin substantially free of hydroxyl functionality; and an anhydride curing agent.
03/14/2002US20020032136 Dilute cleaning composition and method for using same
03/14/2002US20020031990 Polishing pad, polishing method, and polishing machine for mirror-polishing semiconductor wafers
03/14/2002US20020031988 System and method for creating and navigating a linear hypermedia resource program
03/14/2002US20020031985 Chemical mechanical polishing composition and process
03/14/2002US20020031981 Carrier head with a substrate detection mechanism for a chemical mechanical polishing system
03/14/2002US20020031920 Deuterium treatment of semiconductor devices
03/14/2002US20020031919 Method for improving the sidewall stoichiometry of thin film capacitors
03/14/2002US20020031918 Method of manufacture of ceramic composite wiring structures for semiconductor devices
03/14/2002US20020031917 Laser ablation method employing silicon as a target in oxygen gas to form a porous silicon oxide film; low relative dielectric constant
03/14/2002US20020031916 Semiconductor device and manufacturing method thereof
03/14/2002US20020031915 Method for forming a silicide layer
03/14/2002US20020031914 Post-plasma processing wafer cleaning method and system
03/14/2002US20020031912 Method of manufacturing a copper wiring in a semiconductor device
03/14/2002US20020031911 Forming interlayer insulating film on a semiconductor substrate; forming a damascene pattern by patterning; cleaning, and forming a diffusion barrier layer on the structure, forming chemical enhancer treatment
03/14/2002US20020031910 Method for integrating anti-reflection layer and salicide block
03/14/2002US20020031909 Self-aligned silicone process for low resistivity contacts to thin film silicon-on-insulator mosfets
03/14/2002US20020031908 Forming refractory metal layer on substrate and top surface and a sidewall of patterned copper layer; performing a high density plasma treatment to convert refractory metal layer into implantation layer which serves as diffusion barrier
03/14/2002US20020031907 Depositing titanium layer over a dielectric layer; depositing an aluminum layer on titanium layer; patterning and etching titanium and aluminum layers to form an interconnect signal line
03/14/2002US20020031906 Forming dielectric layer over semiconductor body; forming a via in dielectric layer; forming a trench pattern; etching a trench using etch chemistry comprising a less-polymerizing fluorocarbon, higher-polymerizing flurorocarbon
03/14/2002US20020031905 Methods of making a connection component
03/14/2002US20020031904 Semiconductor device and method for manufacturing the same
03/14/2002US20020031903 Component mounting apparatus and method, component mounting system having the apparatus, and circuit board manufactured by the method
03/14/2002US20020031902 Flip chip-in-leadframe package and process
03/14/2002US20020031901 Contact and via fabrication technologies
03/14/2002US20020031900 Method for aligning quantum dots and semiconductor device fabricated by using the same
03/14/2002US20020031899 Apparatus and method for singulating semiconductor wafers
03/14/2002US20020031898 Method of fabricating an isolation structure on a semiconductor substrate
03/14/2002US20020031897 Adhesive material; board-on-chip (BOC) and lead-on-chip (LOC) semiconductor device package assembly having a semiconductor die adhered to a substrate
03/14/2002US20020031896 Method for fabricating semiconductor device having trench isolations
03/14/2002US20020031895 Method to reduce floating grain defects in dual-sided container capacitor fabrication
03/14/2002US20020031893 Bipolar transistor having a high current gain
03/14/2002US20020031892 Bipolar transistor stabilized with electrical insulating elements
03/14/2002US20020031891 Low-resistance gate transistor and method for fabricating the same
03/14/2002US20020031890 Semiconductor device of STI structure and method of fabricating MOS transistors having consistent threshold voltages
03/14/2002US20020031889 Method for manufacturing a semiconductor device
03/14/2002US20020031888 Method for reducing processing steps when fabricating a flash memory array using a blank implant
03/14/2002US20020031887 ZPROM manufacture and design and methods for forming thin structures using spacers as an etching mask
03/14/2002US20020031886 Flash memory cell
03/14/2002US20020031885 Semiconductor memory device using ferroelectric film
03/14/2002US20020031883 Method of manufacturing semiconductor device
03/14/2002US20020031882 Method for manufacturing a semiconductor integrated circuit of triple well structure
03/14/2002US20020031881 Semiconductor device and method of manufacturing the same
03/14/2002US20020031880 Forming an opening in passivation layer to expose aluminum-based peripheral bond pad; forming nickel-vanadium (NiV)/copper metallization structure; coating photoresist layer; performing a selective removal on photoresist layer
03/14/2002US20020031879 Method for fabricating semiconductor device
03/14/2002US20020031878 Plasma etching methods
03/14/2002US20020031877 Method of manufacturing semiconductor device including process for implanting impurities into substrate via MOS transistor gate electrode and gate insulation film
03/14/2002US20020031876 Forming semiconductor film in peripheral circuit region; crystallizing semiconductor film using energy beam with its energy being output continuously in relation to time so that film can serve as an active film of each thin film transistor