| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 04/02/2002 | US6365649 Fused spherical silica, method for producing same and liquid sealing resin composition |
| 04/02/2002 | US6365531 Cleaning and drying method and apparatus for manufacturing semiconductor devices |
| 04/02/2002 | US6365530 Techniques for improving adhesion of silicon dioxide to titanium |
| 04/02/2002 | US6365529 Method for patterning dual damascene interconnects using a sacrificial light absorbing material |
| 04/02/2002 | US6365528 Providing reactor having a semiconductor substrate mounted on a substrate support; formingfluorine and carbon-containing silicon oxide dielectric material by reacting together: oxidizer and silane compound |
| 04/02/2002 | US6365527 Method for depositing silicon carbide in semiconductor devices |
| 04/02/2002 | US6365525 Method of fabricating a semiconductor insulation layer |
| 04/02/2002 | US6365524 Method for making a concave bottom oxide within a trench |
| 04/02/2002 | US6365523 Integrated high density plasma chemical vapor deposition (HDP-CVD) method and chemical mechanical polish (CMP) planarizing method for forming patterned planarized aperture fill layers |
| 04/02/2002 | US6365522 Slurries of abrasive inorganic oxide particles and method for adjusting the abrasiveness of the particles |
| 04/02/2002 | US6365520 Small particle size chemical mechanical polishing composition |
| 04/02/2002 | US6365519 Placing wafers into diffusion furnace, increasing temperature of wafers, introducing aluminum nitride precursor into diffusion furnace, forming layer of aluminum nitride |
| 04/02/2002 | US6365518 Method of processing a substrate in a processing chamber |
| 04/02/2002 | US6365517 Simultaneously subjecting the semiconductor wafer to titanium chloride (ticl.sub.4), hydrogen and nitrogen; subjecting the semiconductor wafer to plasma to cause deposition of titanium nitride based film, reacting with silane |
| 04/02/2002 | US6365516 Advanced cobalt silicidation with in-situ hydrogen plasma clean |
| 04/02/2002 | US6365515 Chemical vapor deposition process |
| 04/02/2002 | US6365514 Two chamber metal reflow process |
| 04/02/2002 | US6365513 Method of making a semiconductor device including testing before thinning the semiconductor substrate |
| 04/02/2002 | US6365512 Method and apparatus for a direct buried strap for same level contact interconnections for semiconductor devices |
| 04/02/2002 | US6365511 Tungsten silicide nitride as a barrier for high temperature anneals to improve hot carrier reliability |
| 04/02/2002 | US6365510 Method for fabricating a contact layer |
| 04/02/2002 | US6365509 Semiconductor manufacturing method using a dielectric photomask |
| 04/02/2002 | US6365508 Process without post-etch cleaning-converting polymer and by-products into an inert layer |
| 04/02/2002 | US6365507 Method of forming integrated circuitry |
| 04/02/2002 | US6365506 Dual-damascene process with porous low-K dielectric material |
| 04/02/2002 | US6365505 Method of making a slot via filled dual damascene structure with middle stop layer |
| 04/02/2002 | US6365504 Self aligned dual damascene method |
| 04/02/2002 | US6365503 Method of improving electromigration in semiconductor device manufacturing processes |
| 04/02/2002 | US6365502 Microelectronic interconnect material with adhesion promotion layer and fabrication method |
| 04/02/2002 | US6365501 Mask repattern process |
| 04/02/2002 | US6365500 Composite bump bonding |
| 04/02/2002 | US6365499 Chip carrier and method of manufacturing and mounting the same |
| 04/02/2002 | US6365498 Integrated process for I/O redistribution and passive components fabrication and devices formed |
| 04/02/2002 | US6365497 Method for making an I - shaped access transistor having a silicide envelop |
| 04/02/2002 | US6365496 Elimination of junction spiking using soft sputter etch and two step tin film during the contact barrier deposition process |
| 04/02/2002 | US6365495 Method for performing metallo-organic chemical vapor deposition of titanium nitride at reduced temperature |
| 04/02/2002 | US6365494 Method for producing an ohmic contact |
| 04/02/2002 | US6365493 Method for antimony and boron doping of spherical semiconductors |
| 04/02/2002 | US6365492 Apparatus for manufacturing a semiconductor device and a method for manufacturing a semiconductor device |
| 04/02/2002 | US6365491 Method for forming a uniform network of semiconductor islands on an insulating substrate |
| 04/02/2002 | US6365490 Process to improve the flow of oxide during field oxidation by fluorine doping |
| 04/02/2002 | US6365489 Creation of subresolution features via flow characteristics |
| 04/02/2002 | US6365488 Method of manufacturing SOI wafer with buried layer |
| 04/02/2002 | US6365487 Depositing a first ruthenium film on a substrate, processing the film by exciting a mixed plasma of argon and hydrogen, depositing second ruthenium film over first, patterning to form lower electrode, forming tantalum oxide film |
| 04/02/2002 | US6365486 Method of fabricating semiconductor devices utilizing in situ passivation of dielectric thin films |
| 04/02/2002 | US6365485 DRAM technology of buried plate formation of bottle-shaped deep trench |
| 04/02/2002 | US6365484 Method of forming semiconductor device with decoupling capacitance |
| 04/02/2002 | US6365483 Method for forming a thin film resistor |
| 04/02/2002 | US6365482 I.C. thin film resistor stabilization method |
| 04/02/2002 | US6365481 Isotropic resistor protect etch to aid in residue removal |
| 04/02/2002 | US6365480 IC resistor and capacitor fabrication method |
| 04/02/2002 | US6365479 Method for independent control of polycrystalline silicon-germanium in a silicon-germanium HBT and related structure |
| 04/02/2002 | US6365478 Solid state electronic device fabrication using crystalline defect control |
| 04/02/2002 | US6365477 Method for producing a heterobiopolar transistor |
| 04/02/2002 | US6365476 Laser thermal process for fabricating field-effect transistors |
| 04/02/2002 | US6365475 Method of forming a MOS transistor |
| 04/02/2002 | US6365474 Method of fabricating an integrated circuit |
| 04/02/2002 | US6365473 Method of manufacturing a transistor in a semiconductor device |
| 04/02/2002 | US6365472 Semiconductor device and method of manufacturing the same |
| 04/02/2002 | US6365471 Method for producing PMOS devices |
| 04/02/2002 | US6365470 Method for manufacturing self-matching transistor |
| 04/02/2002 | US6365469 Method for forming dual-polysilicon structures using a built-in stop layer |
| 04/02/2002 | US6365468 Method for forming doped p-type gate with anti-reflection layer |
| 04/02/2002 | US6365467 Forming oxynitride layer on a semiconductor substrate and a tantalum oxide over oxynitride layer; forming oxide layer; thermal-treatment under nitrogen oxide gas |
| 04/02/2002 | US6365466 Dual gate process using self-assembled molecular layer |
| 04/02/2002 | US6365465 Self-aligned double-gate MOSFET by selective epitaxy and silicon wafer bonding techniques |
| 04/02/2002 | US6365464 Method to eliminate shorts between adjacent contacts due to interlevel dielectric voids |
| 04/02/2002 | US6365463 Method for forming a high-precision analog transistor with a low threshold voltage roll-up and a digital transistor with a high threshold voltage roll-up |
| 04/02/2002 | US6365462 Methods of forming power semiconductor devices having tapered trench-based insulating regions therein |
| 04/02/2002 | US6365459 Method for making flash memory cell having reentrant angle floating gate |
| 04/02/2002 | US6365458 Semiconductor memory device and method of manufacturing the same |
| 04/02/2002 | US6365457 Method for manufacturing nonvolatile memory device using self-aligned source process |
| 04/02/2002 | US6365456 Process for manufacturing semiconductor integrated memory devices with cells matrix having virtual ground |
| 04/02/2002 | US6365455 Flash memory process using polysilicon spacers |
| 04/02/2002 | US6365454 Cylindrical capacitor structure and method of manufacture |
| 04/02/2002 | US6365453 Method and structure for reducing contact aspect ratios |
| 04/02/2002 | US6365452 DRAM cell having a vertical transistor and a capacitor formed on the sidewalls of a trench isolation |
| 04/02/2002 | US6365451 Transistor and method |
| 04/02/2002 | US6365450 Fabrication of P-channel field effect transistor with minimized degradation of metal oxide gate |
| 04/02/2002 | US6365449 Process for making a non-volatile memory cell with a polysilicon spacer defined select gate |
| 04/02/2002 | US6365448 Structure and method for gated lateral bipolar transistors |
| 04/02/2002 | US6365447 High-voltage complementary bipolar and BiCMOS technology using double expitaxial growth |
| 04/02/2002 | US6365446 Formation of silicided ultra-shallow junctions using implant through metal technology and laser annealing process |
| 04/02/2002 | US6365445 Field effect transistor formed in SOI technology with semiconductor material having multiple thicknesses |
| 04/02/2002 | US6365444 Process for forming polycrystalline thin film transistor liquid crystal display |
| 04/02/2002 | US6365443 Method of manufacturing a semiconductor device having data pads formed in scribed area |
| 04/02/2002 | US6365441 Partial underfill for flip-chip electronic packages |
| 04/02/2002 | US6365440 Method for contacting a circuit chip |
| 04/02/2002 | US6365439 Method of manufacturing a ball grid array type semiconductor package |
| 04/02/2002 | US6365438 Process for manufacturing semiconductor package and circuit board assembly |
| 04/02/2002 | US6365436 Connecting multiple microelectronic elements with lead deformation |
| 04/02/2002 | US6365435 Method for producing a flip chip package |
| 04/02/2002 | US6365434 Method and apparatus for reduced flash encapsulation of microelectronic devices |
| 04/02/2002 | US6365433 Semiconductor device and manufacturing method thereof |
| 04/02/2002 | US6365432 Fabrication process of semiconductor package and semiconductor package |
| 04/02/2002 | US6365431 Method of manufacturing a photovoltaic device |
| 04/02/2002 | US6365430 Angle cavity resonant photodetector |
| 04/02/2002 | US6365429 Method for nitride based laser diode with growth substrate removed using an intermediate substrate |
| 04/02/2002 | US6365425 Method of manufacturing semiconductor device |
| 04/02/2002 | US6365423 Method of inspecting a depth of an opening of a dielectric material layer |