| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 04/09/2002 | US6368986 Use of selective ozone TEOS oxide to create variable thickness layers and spacers |
| 04/09/2002 | US6368985 Dual track/stepper interface configuration for wafer processing |
| 04/09/2002 | US6368984 Insulating film and method of forming the same |
| 04/09/2002 | US6368983 Multi-layer wafer fabrication |
| 04/09/2002 | US6368982 Pattern reduction by trimming a plurality of layers of different handmask materials |
| 04/09/2002 | US6368981 Method of manufacturing semiconductor device and chemical mechanical polishing apparatus |
| 04/09/2002 | US6368980 Resist mark having measurement marks for measuring the accuracy of overlay of a photomask disposed on semiconductor wafer and method for manufacturing semiconductor wafer having it |
| 04/09/2002 | US6368979 Process for forming trenches and vias in layers of low dielectric constant carbon-doped silicon oxide dielectric material of an integrated circuit structure |
| 04/09/2002 | US6368978 Chlorine gas |
| 04/09/2002 | US6368977 Semiconductor device manufacturing method |
| 04/09/2002 | US6368976 Method for manufacturing a semiconductor device having film thickness difference between a control gate and a floating gate |
| 04/09/2002 | US6368975 Method and apparatus for monitoring a process by employing principal component analysis |
| 04/09/2002 | US6368974 Shrinking equal effect critical dimension of mask by in situ polymer deposition and etching |
| 04/09/2002 | US6368973 Method of manufacturing a shallow trench isolation structure |
| 04/09/2002 | US6368972 Method for making an integrated circuit including alignment marks |
| 04/09/2002 | US6368971 Method of manufacturing bottom electrode of capacitor |
| 04/09/2002 | US6368970 Semiconductor configuration and corresponding production process |
| 04/09/2002 | US6368969 Chemical-mechanical polishing methods |
| 04/09/2002 | US6368967 Method to control mechanical stress of copper interconnect line using post-plating copper anneal |
| 04/09/2002 | US6368966 Addition of zinc to copper in very low quantities assists in solving the diffusion and self-passivation problems, |
| 04/09/2002 | US6368965 Method for low stress plating of semiconductor vias and channels |
| 04/09/2002 | US6368964 Method for reducing resistance in a conductor |
| 04/09/2002 | US6368963 Passivation of semiconductor device surfaces using an iodine/ethanol solution |
| 04/09/2002 | US6368962 Semiconductor processing method of forming a conductive line, and buried bit line memory circuitry |
| 04/09/2002 | US6368961 Graded compound seed layers for semiconductors |
| 04/09/2002 | US6368960 Double sidewall raised silicided source/drain CMOS transistor |
| 04/09/2002 | US6368959 Method of manufacturing semiconductor device |
| 04/09/2002 | US6368958 Thick copper layer is deposited by disproportionation caused by water which is added to the stabilized cuprous ion solution, hydration energy of cupric ions increased causing cuprous ion disproportionate into cupric and solid copper |
| 04/09/2002 | US6368957 Semiconductor device and method for manufacturing semiconductor device |
| 04/09/2002 | US6368956 Method of manufacturing a semiconductor device |
| 04/09/2002 | US6368955 Method of polishing semiconductor structures using a two-step chemical mechanical planarization with slurry particles having different particle bulk densities |
| 04/09/2002 | US6368954 Method of copper interconnect formation using atomic layer copper deposition |
| 04/09/2002 | US6368953 Encapsulated metal structures for semiconductor devices and MIM capacitors including the same |
| 04/09/2002 | US6368952 Diffusion inhibited dielectric structure for diffusion enhanced conductor layer |
| 04/09/2002 | US6368951 Semiconductor device manufacturing method and semiconductor device |
| 04/09/2002 | US6368950 Silicide gate transistors |
| 04/09/2002 | US6368949 Post-spacer etch surface treatment for improved silicide formation |
| 04/09/2002 | US6368948 By reducing the time exposed to elevated temperatures for plasma surface treatment; reacting ammonia and nitrogen with silane to deposit a silicon nitride barrier layer |
| 04/09/2002 | US6368947 Process utilizing a cap layer optimized to reduce gate line over-melt |
| 04/09/2002 | US6368946 Manufacture of a semiconductor device with an epitaxial semiconductor zone |
| 04/09/2002 | US6368945 Method and system for providing a continuous motion sequential lateral solidification |
| 04/09/2002 | US6368944 Method of manufacturing photovoltaic element and apparatus therefor |
| 04/09/2002 | US6368943 Semiconductor method of manufacture |
| 04/09/2002 | US6368941 Fabrication of a shallow trench isolation by plasma oxidation |
| 04/09/2002 | US6368940 Method for fabricating a microelectronic structure |
| 04/09/2002 | US6368939 Multilevel interconnection structure having an air gap between interconnects |
| 04/09/2002 | US6368938 Process for manufacturing a silicon-on-insulator substrate and semiconductor devices on said substrate |
| 04/09/2002 | US6368937 Method of manufacturing semiconductor device |
| 04/09/2002 | US6368936 Method for forming a semiconductor integrated circuit |
| 04/09/2002 | US6368935 Method for upgrading quality of DRAM capacitor and wafer-to-wafer uniformity |
| 04/09/2002 | US6368934 Semiconductor memory device and method of manufacturing the same |
| 04/09/2002 | US6368932 Method for producing diodes |
| 04/09/2002 | US6368931 Thin tensile layers in shallow trench isolation and method of making same |
| 04/09/2002 | US6368930 Self aligned symmetric process and device |
| 04/09/2002 | US6368929 Method of manufacturing a semiconductor component and semiconductor component thereof |
| 04/09/2002 | US6368928 Method of forming an indium retrograde profile via use of a low temperature anneal procedure to reduce NMOS short channel effects |
| 04/09/2002 | US6368927 Method of manufacturing transistor having elevated source and drain regions |
| 04/09/2002 | US6368926 Method of forming a semiconductor device with source/drain regions having a deep vertical junction |
| 04/09/2002 | US6368925 Adjusting the temperature and pressure of h2 bake process to prevent the etching of a separation oxide at an interfae of an active region and a field region thereby ensuring theat an epitaxial-channel is formed having uniform shape |
| 04/09/2002 | US6368924 Amorphous carbon layer for improved adhesion of photoresist and method of fabrication |
| 04/09/2002 | US6368923 Method of fabricating a dual metal gate having two different gate dielectric layers |
| 04/09/2002 | US6368921 Manufacture of trench-gate semiconductor devices |
| 04/09/2002 | US6368920 Trench MOS gate device |
| 04/09/2002 | US6368919 Method and composite for decreasing charge leakage |
| 04/09/2002 | US6368918 Method of fabricating Nan embedded flash EEPROM with a tunnel oxide grown on a textured substrate |
| 04/09/2002 | US6368917 Methods of fabricating floating gate semiconductor device with reduced erase voltage |
| 04/09/2002 | US6368916 Method for fabricating nonvolatile semiconductor memory device |
| 04/09/2002 | US6368915 Method of manufacturing a semiconductor device |
| 04/09/2002 | US6368914 Well structure in non-volatile memory device and method for fabricating the same |
| 04/09/2002 | US6368913 Method of manufacturing a semiconductor device and a semiconductor device |
| 04/09/2002 | US6368912 Method of fabricating an isolation structure between a vertical transistor and a deep trench capacitor |
| 04/09/2002 | US6368911 Method for manufacturing a buried gate |
| 04/09/2002 | US6368910 Method of fabricating ruthenium-based contact plug for memory devices |
| 04/09/2002 | US6368909 Methods of fabricating integrated circuit ferroelectric capacitors including tensile stress applying layers on the upper electrode thereof |
| 04/09/2002 | US6368908 Method of fabricating dynamic random access memory capacitor |
| 04/09/2002 | US6368907 Method of fabricating semiconductor device |
| 04/09/2002 | US6368906 Method of planarization using selecting curing of SOG layer |
| 04/09/2002 | US6368905 Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device |
| 04/09/2002 | US6368904 Semiconductor device and method of manufacturing the same |
| 04/09/2002 | US6368903 SOI low capacitance body contact |
| 04/09/2002 | US6368902 Enhanced efuses by the local degradation of the fuse link |
| 04/09/2002 | US6368899 Electronic device packaging |
| 04/09/2002 | US6368898 Solid-state image sensing device |
| 04/09/2002 | US6368895 Method of producing an electronic circuit device |
| 04/09/2002 | US6368894 Multi-chip semiconductor module and manufacturing process thereof |
| 04/09/2002 | US6368893 Method of fabricating semiconductor device |
| 04/09/2002 | US6368887 Method of monitoring a process of manufacturing a semiconductor wafer including hemispherical grain polysilicon |
| 04/09/2002 | US6368886 Method of recovering encapsulated die |
| 04/09/2002 | US6368884 Die-based in-fab process monitoring and analysis system for semiconductor processing |
| 04/09/2002 | US6368883 Method for identifying and controlling impact of ambient conditions on photolithography processes |
| 04/09/2002 | US6368882 Method for detecting organic contamination by using hemispherical-grain polysilicon layer |
| 04/09/2002 | US6368881 Wafer thickness control during backside grind |
| 04/09/2002 | US6368880 Depositing barrier/wetting layer over surfaces of aperture, the barrier/wetting layer comprising tantalum, tantalum nitride, tungsten, tungsten nitride, and combinations thereof, depositing a conformal metal layer over the surface |
| 04/09/2002 | US6368879 Process control with control signal derived from metrology of a repetitive critical dimension feature of a test structure on the work piece |
| 04/09/2002 | US6368878 Intentional asymmetry imposed during fabrication and/or access of magnetic tunnel junction devices |
| 04/09/2002 | US6368776 Amplified photoresist; exposure to light; process control |
| 04/09/2002 | US6368773 Photoresist cross-linker and photoresist composition comprising the same |
| 04/09/2002 | US6368771 Photoresist polymers and photoresist compositions containing the same |
| 04/09/2002 | US6368770 Photoresist monomers, polymers thereof, and photoresist compositions containing the same |
| 04/09/2002 | US6368768 Organic anti-reflective coating material and its preparation |