| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 04/16/2002 | US6372854 Hydrogenated ring-opening metathesis polymer and its use and production |
| 04/16/2002 | US6372700 Fluorinated solvent compositions containing ozone |
| 04/16/2002 | US6372699 Dissolving oxygen into water to saturate; adding ammonia and hydrogen peroxide |
| 04/16/2002 | US6372673 Silicon-starved nitride spacer deposition |
| 04/16/2002 | US6372672 Plasma enhanced vapor deposition; low hydrogen for popping removal; reduced thermal stress variation |
| 04/16/2002 | US6372671 Surface stabilization of silicon rich silica glass using increased post deposition delay |
| 04/16/2002 | US6372670 Method and apparatus for forming an interlayer insulating film, and semiconductor device |
| 04/16/2002 | US6372669 Method of depositing silicon oxides |
| 04/16/2002 | US6372668 Method of forming silicon oxynitride films |
| 04/16/2002 | US6372667 Method of manufacturing a capacitor for semiconductor memory devices |
| 04/16/2002 | US6372666 Depositing hydrolyzed and condensed alkoxysilane; heating to form nanoporous silica; curing |
| 04/16/2002 | US6372665 Method for forming a semiconductor device |
| 04/16/2002 | US6372664 Gas flow of silane and nitrous oxide; forming silicon oxide by oxidation reaction of ozone and tetraethyl silicate; vapor deposition |
| 04/16/2002 | US6372663 Dual-stage wet oxidation process utilizing varying H2/O2 ratios |
| 04/16/2002 | US6372662 Multilayer structure having successively a first layer of doped silicon a thin oxide layer, and a second layer of silicon-containing material. the oxide layer has a uniform thickness preventing diffusion of dopants |
| 04/16/2002 | US6372661 Method to improve the crack resistance of CVD low-k dielectric constant material |
| 04/16/2002 | US6372660 Method for patterning a dual damascene with masked implantation |
| 04/16/2002 | US6372659 Fabrication of metal oxide structure for a gate dielectric of a field effect transistor |
| 04/16/2002 | US6372657 Method for selective etching of oxides |
| 04/16/2002 | US6372656 Method of producing a radiation sensor |
| 04/16/2002 | US6372655 Etches a layer in a structure with a first etchant etch until a layer in a fastest etching region is etched; layer is then etched with a second etchant until a layer in a region with a slowest etch rate is etched. |
| 04/16/2002 | US6372654 Apparatus for fabricating a semiconductor device and method of doing the same |
| 04/16/2002 | US6372653 Method of forming dual damascene structure |
| 04/16/2002 | US6372651 Method for trimming a photoresist pattern line for memory gate etching |
| 04/16/2002 | US6372650 By use of either a vapor including 1) sulfuric acid, 2) hydrochloric acid, 3) nitric acid or 4) chlorosulfonic acid. |
| 04/16/2002 | US6372649 Method for forming multi-level metal interconnection |
| 04/16/2002 | US6372648 Providing oxide particles in a basic slurry, particles including surface regions bonded to functional groups, slurry free of any binding polymer; using slurry of step to chemo-mechanically polish a substrate |
| 04/16/2002 | US6372647 Via masked line first dual damascene |
| 04/16/2002 | US6372646 Optical article, exposure apparatus or optical system using it, and process for producing it |
| 04/16/2002 | US6372645 Methods to reduce metal bridges and line shorts in integrated circuits |
| 04/16/2002 | US6372644 Forming a silicon gate electrode, forming silicon nitride spacers; treating silicon nitride sidewall spacers to form hydrogen passivated regions; depositing nickel layer; heating to form nickel silicide layer |
| 04/16/2002 | US6372643 Method for forming a selective contact and local interconnect in situ and semiconductor devices carrying the same |
| 04/16/2002 | US6372642 Method for patterning semiconductor devices with a resolution down to 0.12 μm on a silicon substrate using oxynitride film and deep UV lithography |
| 04/16/2002 | US6372640 Method of locally forming metal silicide layers |
| 04/16/2002 | US6372639 Method for constructing interconnects for sub-micron semiconductor devices and the resulting semiconductor devices |
| 04/16/2002 | US6372638 Method for forming a conductive plug between conductive layers of an integrated circuit |
| 04/16/2002 | US6372637 Method for making semiconductor devices having gradual slope contacts |
| 04/16/2002 | US6372636 Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damascene |
| 04/16/2002 | US6372635 Method for making a slot via filled dual damascene low k interconnect structure without middle stop layer |
| 04/16/2002 | US6372634 Exposing portions of an upper surface of semiconductor wafer material through photoresist openings of a photoresist layer; etching exposed portions with etchant mixture comprising hydrofluorocarbons; forming acarbon containing residue |
| 04/16/2002 | US6372633 Method and apparatus for forming metal interconnects |
| 04/16/2002 | US6372632 Method to eliminate dishing of copper interconnects by the use of a sacrificial oxide layer |
| 04/16/2002 | US6372631 Method of making a via filled dual damascene structure without middle stop layer |
| 04/16/2002 | US6372630 Semiconductor device and fabrication method thereof |
| 04/16/2002 | US6372629 Methods of fabricating buried digit lines and semiconductor devices including same |
| 04/16/2002 | US6372628 Insulating film comprising amorphous carbon fluoride, a semiconductor device comprising such an insulating film, and a method for manufacturing the semiconductor device |
| 04/16/2002 | US6372626 Method of reducing step heights in integrated circuits by using dummy conductive lines, and integrated circuits fabricated thereby |
| 04/16/2002 | US6372625 Semiconductor device having bonding wire spaced from semiconductor chip |
| 04/16/2002 | US6372624 Method for fabricating solder bumps by wave soldering |
| 04/16/2002 | US6372623 Semiconductor device and method of fabrication |
| 04/16/2002 | US6372622 Fine pitch bumping with improved device standoff and bump volume |
| 04/16/2002 | US6372621 Method of forming a bonding pad on a semiconductor chip |
| 04/16/2002 | US6372620 Fabrication method of wiring substrate for mounting semiconductor element and semiconductor device |
| 04/16/2002 | US6372619 Method for fabricating wafer level chip scale package with discrete package encapsulation |
| 04/16/2002 | US6372618 Methods of forming semiconductor structures |
| 04/16/2002 | US6372617 Method of manufacturing non-volatile memory |
| 04/16/2002 | US6372616 Method of manufacturing an electrical interconnection of a semiconductor device using an erosion protecting plug in a contact hole of interlayer dielectric layer |
| 04/16/2002 | US6372615 MOSFET and fabrication method thereof |
| 04/16/2002 | US6372614 Dual damascene method for backened metallization using poly stop layers |
| 04/16/2002 | US6372613 Method of manufacturing a gate electrode with low resistance metal layer remote from a semiconductor |
| 04/16/2002 | US6372612 Method for manufacturing semiconductor circuit |
| 04/16/2002 | US6372611 Semiconductor manufacturing method including gettering of metal impurities |
| 04/16/2002 | US6372610 Method for die separation of a wafer by ion implantation |
| 04/16/2002 | US6372609 Method of Fabricating SOI wafer by hydrogen ION delamination method and SOI wafer fabricated by the method |
| 04/16/2002 | US6372608 Separating method, method for transferring thin film device, thin film device, thin film integrated circuit device, and liquid crystal display device manufactured by using the transferring method |
| 04/16/2002 | US6372606 Method of forming isolation trenches in a semiconductor device |
| 04/16/2002 | US6372605 Additional etching to decrease polishing time for shallow-trench isolation in semiconductor processing |
| 04/16/2002 | US6372604 Method for forming a trench type element isolation structure and trench type element isolation structure |
| 04/16/2002 | US6372603 Photodiode with tightly-controlled junction profile for CMOS image sensor with STI process |
| 04/16/2002 | US6372602 Method of forming a shallow trench isolation structure in a semiconductor device |
| 04/16/2002 | US6372601 Isolation region forming methods |
| 04/16/2002 | US6372600 Etch stops and alignment marks for bonded wafers |
| 04/16/2002 | US6372599 Semiconductor device and method of manufacturing the same |
| 04/16/2002 | US6372598 Forming sacrificial metal layer; replacement |
| 04/16/2002 | US6372597 Method and a circuit for improving the effectiveness of ESD protection in circuit structures formed in a semiconductor substrate |
| 04/16/2002 | US6372596 Method of making horizontal bipolar transistor with insulated base structure |
| 04/16/2002 | US6372595 Lateral bipolar junction transistor with reduced parasitic current loss |
| 04/16/2002 | US6372594 Fabrication method of submicron gate using anisotropic etching |
| 04/16/2002 | US6372593 Method of manufacturing SOI substrate and semiconductor device |
| 04/16/2002 | US6372592 Self-aligned MOSFET with electrically active mask |
| 04/16/2002 | US6372591 Fabrication method of semiconductor device using ion implantation |
| 04/16/2002 | US6372590 Method for making transistor having reduced series resistance |
| 04/16/2002 | US6372589 Method of forming ultra-shallow source/drain extension by impurity diffusion from doped dielectric spacer |
| 04/16/2002 | US6372588 Method of making an IGFET using solid phase diffusion to dope the gate, source and drain |
| 04/16/2002 | US6372587 Angled halo implant tailoring using implant mask |
| 04/16/2002 | US6372585 Semiconductor device method |
| 04/16/2002 | US6372584 Method for making raised source/drain regions using laser |
| 04/16/2002 | US6372583 Process for making semiconductor device with epitaxially grown source and drain |
| 04/16/2002 | US6372582 Indium retrograde channel doping for improved gate oxide reliability |
| 04/16/2002 | US6372581 Process for nitriding the gate oxide layer of a semiconductor device and device obtained |
| 04/16/2002 | US6372580 Process for making mask ROM using a salicide process and mask ROM |
| 04/16/2002 | US6372579 Producing laterally diffused metal-oxide semiconductor |
| 04/16/2002 | US6372578 Manufacturing method of non-volatile semiconductor device |
| 04/16/2002 | US6372577 Core cell structure and corresponding process for NAND type performance flash memory device |
| 04/16/2002 | US6372576 Method for manufacturing a floating gate in a flash memory device |
| 04/16/2002 | US6372575 Method for fabricating capacitor of dram using self-aligned contact etching technology |
| 04/16/2002 | US6372574 Method of forming a capacitor container electrode and method of patterning a metal layer by selectively silicizing the electrode or metal layer and removing the silicized portion |
| 04/16/2002 | US6372573 Self-aligned trench capacitor capping process for high density DRAM cells |
| 04/16/2002 | US6372572 Method of planarizing peripheral circuit region of a DRAM |
| 04/16/2002 | US6372571 Method of manufacturing semiconductor device |