| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 07/02/2002 | US6413888 Method and apparatus for preventing rapid temperature variation of wafers during processing |
| 07/02/2002 | US6413887 Method for producing silicon nitride series film |
| 07/02/2002 | US6413886 Filling recesses using high pressure plasma vapor deposition |
| 07/02/2002 | US6413885 Method for patterning semiconductor devices on a silicon substrate using oxynitride film |
| 07/02/2002 | US6413884 Substrate to rotates around a center axis in accompany with a first gas spouting toward the substrate and colliding with a second gas |
| 07/02/2002 | US6413883 Method of liquid deposition by selection of liquid viscosity and other precursor properties |
| 07/02/2002 | US6413882 Low dielectric foam dielectric formed from polymer decomposition |
| 07/02/2002 | US6413881 Multilayer semiconductor; nitriding silicon oxide under vacuum |
| 07/02/2002 | US6413880 Strongly textured atomic ridge and dot fabrication |
| 07/02/2002 | US6413879 Porous silica; applying radio frequency |
| 07/02/2002 | US6413878 Method of manufacturing electronic components |
| 07/02/2002 | US6413877 Method of preventing damage to organo-silicate-glass materials during resist stripping |
| 07/02/2002 | US6413876 Method for plasma processing high-speed semiconductor circuits with increased yield |
| 07/02/2002 | US6413875 Process and apparatus for improving the performance of a temperature-sensitive etch process |
| 07/02/2002 | US6413874 Method and apparatus for etching a semiconductor article and method of preparing a semiconductor article by using the same |
| 07/02/2002 | US6413873 System for chemical mechanical planarization |
| 07/02/2002 | US6413872 Method op optimizing vias between conductive layers in an integrated circuit structure |
| 07/02/2002 | US6413871 Nitriding the surface of fluorine-doped silicon glass (fsg); the nitrogen acts as a gettering agent for both hydrogen and free fluorine, suppressing the formation of hydrofluoric acid |
| 07/02/2002 | US6413870 Process of removing CMP scratches by BPSG reflow and integrated circuit chip formed thereby |
| 07/02/2002 | US6413869 Dielectric protected chemical-mechanical polishing in integrated circuit interconnects |
| 07/02/2002 | US6413868 Modular high frequency integrated circuit structure |
| 07/02/2002 | US6413867 Film thickness control using spectral interferometry |
| 07/02/2002 | US6413866 Method of forming a solute-enriched layer in a substrate surface and article formed thereby |
| 07/02/2002 | US6413864 Forming interlayer insulating film on a semiconductor substrate; forming a damascene pattern by patterning; cleaning, and forming a diffusion barrier layer on the structure, forming chemical enhancer treatment |
| 07/02/2002 | US6413863 Method to resolve the passivation surface roughness during formation of the AlCu pad for the copper process |
| 07/02/2002 | US6413862 Use of palladium in IC manufacturing |
| 07/02/2002 | US6413861 Method of fabricating a salicide of an embedded memory |
| 07/02/2002 | US6413860 PECVD of Ta films from tanatalum halide precursors |
| 07/02/2002 | US6413859 Forming a metal alloy containing cobalt and titanium layer over a portion of silicon-containing substrate, annealing to convert portion metal alloy into metal alloy silicide layer; removing unconverted metal alloy; annealing |
| 07/02/2002 | US6413858 Barrier and electroplating seed layer |
| 07/02/2002 | US6413857 Method of creating ground to avoid charging in SOI products |
| 07/02/2002 | US6413856 Method of fabricating dual damascene structure |
| 07/02/2002 | US6413854 Method to build multi level structure |
| 07/02/2002 | US6413853 Method of forming a tungsten plug in a semiconductor device |
| 07/02/2002 | US6413852 Method of forming multilevel interconnect structure containing air gaps including utilizing both sacrificial and placeholder material |
| 07/02/2002 | US6413851 Method of fabrication of barrier cap for under bump metal |
| 07/02/2002 | US6413850 Method of forming bumps |
| 07/02/2002 | US6413849 Integrated circuit package with surface mounted pins on an organic substrate and method of fabrication therefor |
| 07/02/2002 | US6413847 Method of forming dummy metal pattern |
| 07/02/2002 | US6413846 Forming transistor over semiconductor; forming dielectrics; etching |
| 07/02/2002 | US6413845 Method for fabricating metal interconnections |
| 07/02/2002 | US6413844 Heating; exposure to arsenic doping gases; termination; cooling |
| 07/02/2002 | US6413843 Method of forming a semiconductor memory device having source/drain diffusion layers with a reduced resistance |
| 07/02/2002 | US6413842 Semiconductor device and method of fabricating the same |
| 07/02/2002 | US6413841 MOS type semiconductor device and manufacturing method thereof |
| 07/02/2002 | US6413840 Method of gettering layer for improving chemical-mechanical polishing process in flash memory production and semiconductor structure thereof |
| 07/02/2002 | US6413839 Semiconductor device separation using a patterned laser projection |
| 07/02/2002 | US6413838 Manufacturing method of display device |
| 07/02/2002 | US6413836 Method of making isolation trench |
| 07/02/2002 | US6413835 Semiconductor structure and fabrication method of shallow and deep trenches |
| 07/02/2002 | US6413834 Methods for etching silicon dioxide; and methods for forming isolation regions |
| 07/02/2002 | US6413833 Method for forming a CVD silicon film |
| 07/02/2002 | US6413832 Method for forming inner-cylindrical capacitor without top electrode mask |
| 07/02/2002 | US6413831 Method of fabrication for a honeycomb capacitor |
| 07/02/2002 | US6413830 Dynamic random access memory |
| 07/02/2002 | US6413828 Process using poly-buffered STI |
| 07/02/2002 | US6413827 Low dielectric constant shallow trench isolation |
| 07/02/2002 | US6413826 Gate insulator process for nanometer MOSFETS |
| 07/02/2002 | US6413824 Method to partially or completely suppress pocket implant in selective circuit elements with no additional mask in a cmos flow where separate masking steps are used for the drain extension implants for the low voltage and high voltage transistors |
| 07/02/2002 | US6413823 Methods of forming field effect transistors |
| 07/02/2002 | US6413822 Super-self-aligned fabrication process of trench-gate DMOS with overlying device layer |
| 07/02/2002 | US6413821 Method of fabricating semiconductor device including nonvolatile memory and peripheral circuit |
| 07/02/2002 | US6413820 Method of forming a composite interpoly gate dielectric |
| 07/02/2002 | US6413819 Memory device and method for using prefabricated isolated storage elements |
| 07/02/2002 | US6413818 Method for forming a contoured floating gate cell |
| 07/02/2002 | US6413817 Method of forming self-aligned stacked capacitor |
| 07/02/2002 | US6413816 Method for forming memory cell of semiconductor memory device |
| 07/02/2002 | US6413815 Method of forming a MIM capacitor |
| 07/02/2002 | US6413814 Manufacture of a semiconductor device with retrograded wells |
| 07/02/2002 | US6413813 Method for making DRAM using an oxide plug in the bitline contacts during fabrication |
| 07/02/2002 | US6413812 Methods for forming ZPROM using spacers as an etching mask |
| 07/02/2002 | US6413811 Method of forming a shared contact in a semiconductor device including MOSFETS |
| 07/02/2002 | US6413810 Fabrication method of a dual-gate CMOSFET |
| 07/02/2002 | US6413809 Method of manufacturing a non-volatile memory having an element isolation insulation film embedded in the trench |
| 07/02/2002 | US6413808 Semiconductor device and process for production thereof |
| 07/02/2002 | US6413807 Semiconductor device having silicide films on a gate electrode and a diffusion layer and manufacturing method thereof |
| 07/02/2002 | US6413805 Semiconductor device forming method |
| 07/02/2002 | US6413804 Method of fabrication of thin film transistor |
| 07/02/2002 | US6413803 Design and process for a dual gate structure |
| 07/02/2002 | US6413802 Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture |
| 07/02/2002 | US6413801 Method of molding semiconductor device and molding die for use therein |
| 07/02/2002 | US6413800 Hermetic cold weld seal |
| 07/02/2002 | US6413798 Package having very thin semiconductor chip, multichip module assembled by the package, and method for manufacturing the same |
| 07/02/2002 | US6413794 Method of forming photovoltaic element |
| 07/02/2002 | US6413793 Method of forming protrusions on single crystal silicon structures built on silicon-on-insulator wafers |
| 07/02/2002 | US6413791 Overcoating polycrystalline semiconductors; controlling oxygen concentration |
| 07/02/2002 | US6413790 Preferred methods for producing electrical circuit elements used to control an electronic display |
| 07/02/2002 | US6413789 Method of detecting and monitoring stresses in a semiconductor wafer |
| 07/02/2002 | US6413788 Keepers for MRAM electrodes |
| 07/02/2002 | US6413787 Method for fabricating dielectric film |
| 07/02/2002 | US6413701 Radiation system, masking table |
| 07/02/2002 | US6413695 Enantiomorphs; exposure, development |
| 07/02/2002 | US6413688 In which a detection ratio of pseudo defects in a pattern inspection process is lowered, so that the number of steps in the inspection process is lessened; semiconductors |
| 07/02/2002 | US6413683 Developing a photomask layouts |
| 07/02/2002 | US6413682 Synthetic quartz glass substrate for photomask and making method |
| 07/02/2002 | US6413647 Composition for film formation, method of film formation, and silica-based film |
| 07/02/2002 | US6413627 Freestanding, transparent gallium nitride; distortion-free; low concentration of arsenic and carbon-free; low cost; for use in light emitting diodes |
| 07/02/2002 | US6413592 Apparatus for forming a deposited film by plasma chemical vapor deposition |
| 07/02/2002 | US6413583 Oxidizing methylsilanes with water, oxygen, and ozone and curing; forms uniform deposits of silicon oxides containing hydroxyl groups and having low dielectric constants; gap fillers for semiconductor devices |
| 07/02/2002 | US6413576 Coating uninsulated portion of copper circuit with layer of ceramic having thickness for soldering without fluxing; integrated circuits |