Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2002
06/20/2002US20020076905 Method of eliminating silicon residual from wafer after dicing saw process
06/20/2002US20020076904 Separation method for gallium nitride devices on lattice-mismatched substrates
06/20/2002US20020076902 Low temperature silicon wafer bond process with bulk material bond strength
06/20/2002US20020076901 Method for forming isolation regions on semiconductor device
06/20/2002US20020076900 Method of forming shallow trench isolation layer in semiconductor device
06/20/2002US20020076899 Process for fabricating a substrate of the silicon-on-insulator or silicon-on-nothing type and resulting device
06/20/2002US20020076898 Method of forming a groove-like area in a semiconductor device
06/20/2002US20020076896 Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials
06/20/2002US20020076895 Fabrication method for an embedded dynamic random access memory (DRAM)
06/20/2002US20020076894 Semiconductor device with capacitor and method of manufacturing thereof
06/20/2002US20020076893 Method for manufacturing a bipolar junction transistor
06/20/2002US20020076892 Method for manufacturing a bipolar junction transistor
06/20/2002US20020076891 Semiconductor device and method for fabricating the same
06/20/2002US20020076889 Sacrificial polysilicon sidewall process and rapid thermal spike annealing for advance CMOS fabrication
06/20/2002US20020076888 Method for manufacturing semiconductor device
06/20/2002US20020076887 Method of making a low leakage dynamic threshold voltage mos (dtmos) transistor
06/20/2002US20020076886 Complementary transistors having respective gates formed from a metal and a corresponding metal-silicide
06/20/2002US20020076885 Low resistance complementary metal oxide (CMOS) transistor and method
06/20/2002US20020076884 Self-aligned nitride pattern for improved process window
06/20/2002US20020076883 Method of forming a tunnel oxide layer of a non-volatile memory cell
06/20/2002US20020076882 Wafer cassette, and liquid-phase growth system and liquid-phase growth process which make use of the same
06/20/2002US20020076881 Ruthenium silicon oxide (RuSixoy) adhesion layer is formed by chemical vapor deposition using a ruthenium precursor and a silicon precursor
06/20/2002US20020076880 Semiconductor device and method of fabricating the same
06/20/2002US20020076879 Integrated circuit devices having trench isolation structures and methods of fabricating the same
06/20/2002US20020076878 Method for manufacturing capacitor of semiconductor memory device by two-step thermal treatment
06/20/2002US20020076877 Method to form self-aligned, L-shaped sidewall spacers
06/20/2002US20020076876 Method for manufacturing semiconductor devices having ESD protection
06/20/2002US20020076874 Method for epitaxial bipolar bicmos
06/20/2002US20020076873 Method and device for protecting micro electromechanical systems structures during dicing of a wafer
06/20/2002US20020076871 Cold-curing silicone compositions, in particular those of the two-component type
06/20/2002US20020076870 Method for CMOS well drive in a non-inert ambient
06/20/2002US20020076869 Gate insulation film having a slanted nitrogen concentration profile
06/20/2002US20020076868 MOS transistor in an integrated circuit and active area forming method
06/20/2002US20020076867 Method of forming a metal gate in a semiconductor device
06/20/2002US20020076866 Method for forming self-aligned contact
06/20/2002US20020076865 Electrical interconnection and thin film transistor fabrication mehods, and integrated circuitry
06/20/2002US20020076864 Method of fabricating a silicon island
06/20/2002US20020076862 Thin film transistor and method for manufacturing the same
06/20/2002US20020076861 Method for fabricating array substrate for X-ray detector
06/20/2002US20020076860 Method of fabricating power VLSI diode devices
06/20/2002US20020076859 Overmolding encapsulation process and encapsulated article made therefrom
06/20/2002US20020076856 Method and apparatus for transfer molding encapsulation of a semiconductor die with attached heat sink
06/20/2002US20020076854 System, method and apparatus for constructing a semiconductor wafer-interposer using B-Stage laminates
06/20/2002US20020076853 Backside bus vias
06/20/2002US20020076852 Method for manufacturing a component which is encapsulated in plastic, and a component which is encapsulated in plastic
06/20/2002US20020076850 Device structure for storing charge and method therefore
06/20/2002US20020076848 Method and device for protecting micro electromechanical systems structures during dicing of a wafer
06/20/2002US20020076845 Manufacturing method for reflection type liquid crystal display
06/20/2002US20020076844 Method of fabricating an imager array
06/20/2002US20020076843 Semiconductor structure having a silicon oxynitride ARC layer and a method of forming the same
06/20/2002US20020076840 Test wafer and method for investigating electrostatic discharge induced wafer defects
06/20/2002US20020076839 Method for evaluating impurity concentrations in epitaxial reagent gases
06/20/2002US20020076838 Polishing method
06/20/2002US20020076837 Thin films for magnetic device
06/20/2002US20020076836 Process for manufacturing a ferroelectric capacitor
06/20/2002US20020076660 Forming a resist pattern having a shrinkage-inhibiting effect on a substrate, baking pattern to release gas, film forming an electrode while keping the substrate below the baking temperature of the resist pattern, separating the resist
06/20/2002US20020076659 Apparatus and method of thermal processing and method of pattern formation
06/20/2002US20020076658 Coating and developing apparatus and pattern forming method
06/20/2002US20020076654 Pattern in chip areas of a photomask is transferred onto an internal area of a semiconductor wafer as ship areas including defects among the chip areas of the photomask are shielded with a light shielding body; shortens time
06/20/2002US20020076653 Using a Fence Creation and Elimination (FCE) planarization process; for VLSI (Very Large Scale Integration) technology; replaces chemical mechanical polishing to eliminate it associated defects
06/20/2002US20020076650 I-line photoresist compositions
06/20/2002US20020076643 Novel onium salts, photoacid generators, resist compositions, and patterning process
06/20/2002US20020076642 Crosslinked polymeric particles including one or more chromophore units such as anthracenyl methacrylate; relief images
06/20/2002US20020076641 Photosensitive polymer having fused aromatic ring and photoresist composition containing the same
06/20/2002US20020076629 Exposure method and exposure system the same
06/20/2002US20020076628 Projection aligner, exposing method and semiconductor device
06/20/2002US20020076626 Method of extending the stability of a photoresist during direct writing of an image upon the photoresist
06/20/2002US20020076623 Photo mask to be used for photolithography, method of inspecting pattern defect, and method of manufacturing semiconductor device through use of the mask
06/20/2002US20020076622 Structure and method of correcting proximity effects in a tri-tone attenuated phase-shifting mask
06/20/2002US20020076620 Structures and structure forming methods
06/20/2002US20020076574 Conductor alloy of between .001% and 2 atomic% of titanium, zirconium, indium, tin and hafnium abbuted by a liner of a tantalum, tugsten, titanium, niobium and vanadium alloy
06/20/2002US20020076572 Method for fabricating integrated circuit arrangements, and associated circuit arrangements, in particular tunnel contact elements
06/20/2002US20020076562 Oxide/organic polymer multilayer thin films deposited by chemical vapor deposition
06/20/2002US20020076560 SiC jig for use in heat treatment
06/20/2002US20020076558 Epoxy resin compositions and premolded semiconductor packages
06/20/2002US20020076543 Layered dielectric nanoporous materials and methods of producing same
06/20/2002US20020076537 Laminated structure
06/20/2002US20020076509 Upper face of the substrate held by the substrate holding device and an upper face of the substrate holding device are almost on one plane; prevents vapor deposition gas from leaking, contacting air
06/20/2002US20020076508 Varying conductance out of a process region to control gas flux in an ALD reactor
06/20/2002US20020076507 Process sequence for atomic layer deposition
06/20/2002US20020076495 Method of making electronic materials
06/20/2002US20020076490 Variable gas conductance control for a process chamber
06/20/2002US20020076485 Dissolving metal compounds in solvent, atomizing metal compound solution, introducing atomized solution into film-forming chamber, forming complex oxide thin film
06/20/2002US20020076481 Introducing first gas into chamber for reacting with surface of substrate to form layer on substrate, first gas creating first pressure, detecting change in pressure, supplying second gas in response to detection of change in pressure
06/20/2002US20020076367 Plasma processing apparatus
06/20/2002US20020076316 Wafer boat and boat holder
06/20/2002US20020076310 System and method for improved throughput of semiconductor wafer processing
06/20/2002US20020076306 Substrate processing system and substrate processing method
06/20/2002US20020076305 Teaching tool for a robot arm for wafer reaction ovens
06/20/2002US20020075743 Antifuse address detecting circuit programmable by applying a high voltage and semiconductor integrated circuit device provided with the same
06/20/2002US20020075736 Semiconductor device and method of manufacturing the same
06/20/2002US20020075732 Semiconductor memory device
06/20/2002US20020075725 Fast program to program verify method
06/20/2002US20020075718 MRAM module configuration
06/20/2002US20020075631 Iridium and iridium oxide electrodes used in ferroelectric capacitors
06/20/2002US20020075625 High temperature electrostatic chuck
06/20/2002US20020075624 Electrostatic chuck bonded to base with a bond layer and method
06/20/2002US20020075574 Oscillation damping system
06/20/2002US20020075469 Stage device and exposure apparatus and method
06/20/2002US20020075468 Projection exposure device
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