Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2002
07/09/2002US6415804 Bowl for processing semiconductor wafers
07/09/2002US6415803 Method and apparatus for semiconductor wafer cleaning with reuse of chemicals
07/09/2002US6415736 Gas distribution apparatus for semiconductor processing
07/04/2002WO2002052702A1 Two part displacement device with detection of the mutual position
07/04/2002WO2002052655A1 Method for roughening a semiconductor chip for optoelectronics
07/04/2002WO2002052652A1 Semiconductor device and its manufacturing method
07/04/2002WO2002052651A1 Ferroelectric memory device
07/04/2002WO2002052650A1 Magnetoresistance storage element
07/04/2002WO2002052649A1 Semiconductor device and portable electronic device
07/04/2002WO2002052646A1 Integrated circuit device
07/04/2002WO2002052643A2 Semiconductor wafer manufacturing process
07/04/2002WO2002052642A2 Method for eliminating reaction between photoresist and organosilicate glass
07/04/2002WO2002052641A2 Contact and via structure and method of fabrication
07/04/2002WO2002052640A1 Method of reducing the specific resistance of an electrically conducting molybdenum layer
07/04/2002WO2002052639A1 Workpiece transfer system, transfer method, vacuum chuck, and wafer centering method
07/04/2002WO2002052638A1 Pressure control method, transfer device, and cluster tool
07/04/2002WO2002052637A2 Method and apparatus for monitoring a semiconductor wafer during a spin drying operation
07/04/2002WO2002052636A2 Method and apparatus for measuring reflectivity of deposited films
07/04/2002WO2002052634A2 Method for characterising and simulating a chemical-mechanical polishing process
07/04/2002WO2002052633A2 Assembly for mounting an integrated circuit on a support
07/04/2002WO2002052632A1 Method of heat treatment of silicon wafer doped with boron
07/04/2002WO2002052631A2 An isotropic etch to form mim capacitor top plates
07/04/2002WO2002052630A2 Structural reinforcement of highly porous low k dielectric films by ild posts
07/04/2002WO2002052629A2 Mechanically reinforced highly porous low dielectric constant films
07/04/2002WO2002052627A1 Pattern forming method and device and semiconductor device, electric circuit, display element module and luminous element
07/04/2002WO2002052626A2 Method for producing a microelectronic component and component produced according to said method
07/04/2002WO2002052625A2 Process of forming p-n layer
07/04/2002WO2002052623A1 Electron beam exposure system and electron beam irradiation position calibrating member
07/04/2002WO2002052622A1 Exposure mask, method for manufacturing the mask, and exposure method
07/04/2002WO2002052621A1 Transfer mask blank, transfer mask and exposure method
07/04/2002WO2002052618A2 Self-aligned double-sided vertical mim-capacitor
07/04/2002WO2002052617A1 Method and device for treating semiconductor substrates
07/04/2002WO2002052616A1 Semiconductor product container and equipment for handling a semiconductor product container
07/04/2002WO2002052612A2 In-process wafer charge monitor and control system for ion implanter
07/04/2002WO2002052573A1 Semiconductor device comprising eeprom and a flash-eprom
07/04/2002WO2002052571A1 Ferroelectric memory device and method for operating memory cell comprising ferroelectric capacitor
07/04/2002WO2002052351A1 Method of measuring overlay
07/04/2002WO2002052350A1 Method of measuring alignment of a substrate with respect to a reference alignment mark
07/04/2002WO2002052349A2 Process for removal of photoresist after post ion implantation
07/04/2002WO2002052348A1 Projection lithography using a phase shifting aperture
07/04/2002WO2002052347A1 Mitigation of radiation induced surface contamination
07/04/2002WO2002052346A1 Objective with at least one aspherical lens
07/04/2002WO2002052303A2 Projection lens
07/04/2002WO2002052290A1 Asynchronous reset circuit testing
07/04/2002WO2002052288A2 Weighted random pattern test using pre-stored weights
07/04/2002WO2002052224A1 Particle-optical inspection device especially for semiconductor wafers
07/04/2002WO2002052062A1 Treating device
07/04/2002WO2002051961A2 Composition comprising an oxidizing and complexing compound
07/04/2002WO2002051955A1 Prevention of precipitation defects on copper interconnects during cmp by use of solutions containing organic compounds with silica adsorption and copper corrosion inhibiting properties
07/04/2002WO2002051769A1 Oxide sinter and process for producing the same
07/04/2002WO2002051741A2 Method for producing a semiconductor component having a movable mass in particular, and semiconductor component produced according to this method
07/04/2002WO2002051715A2 Dual lane conveying apparatus
07/04/2002WO2002051589A1 Method and apparatus for chemical-mechanical polishing (cmp) using upstream and downstream fluid dispensing means
07/04/2002WO2002051587A1 Methods for making reinforced wafer polshing pads and apparatuses implementing the same
07/04/2002WO2002035289A3 Method and materials for printing particle-enhanced electrical contacts
07/04/2002WO2002033018A3 Energy-beam-curable thermal-releasable pressure-sensitive adhesive sheet and method for producing cut pieces using the same
07/04/2002WO2002033017A3 Energy-beam-curable thermal-releasable pressure-sensitive adhesive sheet and method for producing cut pieces using the same
07/04/2002WO2002032636A3 Method for making micromolds
07/04/2002WO2002031879A3 Select transistor architecture for a virtual ground non-volatile memory cell array
07/04/2002WO2002029393A3 Method and apparatus for enhanced embedded substrate inspection through process data collection and substrate imaging techniques
07/04/2002WO2002027406A3 Illumination system particularly for microlithography
07/04/2002WO2002027401A3 Illumination system particularly for microlithography
07/04/2002WO2002025727A3 Method of forming conductive interconnections on an integrated circuit device
07/04/2002WO2002025724A3 Correction of overlay offset between inspection layers in integrated circuits
07/04/2002WO2002025334B1 Isolation device between optically conductive areas
07/04/2002WO2002023592A3 Method and apparatus for reducing ic die mass and thickness while improving strength characteristics
07/04/2002WO2002017359A3 High carrier concentration p-type transparent conducting oxide films
07/04/2002WO2002016078A3 Polishing apparatus and methods controlling the polishing pressure as a function of the overlapping area between the polishing head and the semiconductor substrate
07/04/2002WO2002015245A3 Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence
07/04/2002WO2002014954A3 Antireflective coating compositions
07/04/2002WO2002013258A3 Backside contact for integrated circuit and method of forming same
07/04/2002WO2002011166A3 Quartz glass jig for processing apparatus using plasma
07/04/2002WO2002003439A8 Process for selectively etching doped silicon dioxide over undoped silicon dioxide and silicon nitride
07/04/2002WO2002001644A3 Power mosfet and methods of forming and operating the same
07/04/2002WO2001099153A3 A negative differential resistance device and method of operating same
07/04/2002WO2001091162A3 Bipolar transistor and method of manufacture thereof
07/04/2002WO2001078126A3 A method of passivating a metal line on a wafer
07/04/2002WO2001078117A3 Gaseous process for surface preparation
07/04/2002WO2001075960A3 Method of making a trench gate dmos transistor
07/04/2002WO2001073864A3 Thin-film battery having ultra-thin electrolyte and associated method
07/04/2002WO2001073821A3 Methods for annealing a substrate and article produced by such methods
07/04/2002WO2001037325A9 A method of forming wires on an integrated circuit chip
07/04/2002WO2000070658A9 Multi-zone resistive heater
07/04/2002WO2000070646A9 Secondary electron spectroscopy method and system
07/04/2002US20020087943 Exposure method, exposure system and recording medium
07/04/2002US20020087942 Apparatus for layout designing of semiconductor device, method of layout designing, and semiconductor device
07/04/2002US20020087941 Semiconductor device having embedded array
07/04/2002US20020087929 Test circuit for logical integrated circuit and method for testing same
07/04/2002US20020087927 Method for testing integrated circuits
07/04/2002US20020087661 One click web records
07/04/2002US20020087298 Simulation method, simulation program, and semiconductor device manufacturing method each employing boundary conditions
07/04/2002US20020087297 Method, apparatus, and computer program for Monte Carlo ion implantation simulation, and semiconductor device manufacturing method based on the simulation
07/04/2002US20020087294 Method of formulating load model for glitch analysis and recording medium with the method recorded thereon
07/04/2002US20020087230 In-situ randomization and recording of wafer processing order at process tools
07/04/2002US20020086632 Wafer polishing pad centering apparatus
07/04/2002US20020086624 Carrier head with a flexible membrane for a chemical mechanical polishing system
07/04/2002US20020086623 Dressing apparatus and polishing apparatus
07/04/2002US20020086619 Substrate polishing article
07/04/2002US20020086615 Multi characterized chemical mechanical polishing pad and method for fabricating the same
07/04/2002US20020086585 Insulation device of an electric element