Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2002
08/13/2002US6433419 Face-up semiconductor chip assemblies
08/13/2002US6433418 Apparatus for a vertically accumulable semiconductor device with external leads secured by a positioning mechanism
08/13/2002US6433415 Assembly of plurality of semiconductor devices
08/13/2002US6433412 Semiconductor device and a method of manufacturing the same
08/13/2002US6433410 Semiconductor device tester and method of testing semiconductor device
08/13/2002US6433409 Semiconductor device, lead-patterning substrate, and electronics device, and method for fabricating same
08/13/2002US6433408 Highly integrated circuit including transmission lines which have excellent characteristics
08/13/2002US6433407 Semiconductor integrated circuit
08/13/2002US6433406 Semiconductor device and manufacturing method of the same
08/13/2002US6433403 Integrated circuit having temporary conductive path structure and method for forming the same
08/13/2002US6433402 Selective copper alloy deposition
08/13/2002US6433400 Semiconductor fabrication employing barrier atoms incorporated at the edges of a trench isolation structure
08/13/2002US6433398 Semiconductor integrated circuit device
08/13/2002US6433397 N-channel metal oxide semiconductor (NMOS) driver circuit and method of making same
08/13/2002US6433395 Electrostatic discharge protection for salicided devices
08/13/2002US6433394 Over-voltage protection device for integrated circuits
08/13/2002US6433393 Semiconductor protective device and method for manufacturing same
08/13/2002US6433391 Bonded SOI for floating body and metal gettering control
08/13/2002US6433390 Bonded substrate structures and method for fabricating bonded substrate structures
08/13/2002US6433389 Silicon on insulator logic circuit utilizing diode switching elements
08/13/2002US6433388 Semiconductor device with self-aligned areas formed using a supplemental silicon overlayer
08/13/2002US6433387 Lateral bipolar transistor
08/13/2002US6433385 MOS-gated power device having segmented trench and extended doping zone and process for forming same
08/13/2002US6433384 Semiconductor memory device having sources connected to source lines
08/13/2002US6433383 Methods and arrangements for forming a single interpoly dielectric layer in a semiconductor device
08/13/2002US6433381 Semiconductor device and method of manufacturing the same
08/13/2002US6433380 Integrated circuit capacitors having composite titanium oxide and tantalum pentoxide dielectric layers therein
08/13/2002US6433379 Tantalum anodization for in-laid copper metallization capacitor
08/13/2002US6433378 Integrated circuits having material within structural gaps
08/13/2002US6433376 Ferroelectric memory integrated circuit
08/13/2002US6433374 Light receiving device with built-in circuit
08/13/2002US6433373 CMOS image sensor and a fabrication method for the same
08/13/2002US6433372 Dense multi-gated device design
08/13/2002US6433371 Controlled gate length and gate profile semiconductor device
08/13/2002US6433370 Method and apparatus for cylindrical semiconductor diodes
08/13/2002US6433367 Semiconductor device with sloping sides, and electronic apparatus including semiconductor devices with sloping sides, modified for crack-free wire bonding
08/13/2002US6433366 Circuit-incorporating light receiving device and method of fabricating the same
08/13/2002US6433363 Semiconductor device and manufacturing method thereof
08/13/2002US6433362 Semiconductor device with insulating and transparent original substrate
08/13/2002US6433361 Semiconductor integrated circuit and method for forming the same
08/13/2002US6433359 Surface modified with organic compound
08/13/2002US6433352 Method of positioning semiconductor wafer
08/13/2002US6433351 Exposure apparatus and control method for correcting an exposure optical system on the basis of an estimated magnification variation
08/13/2002US6433346 Electrostatic reticle chucks, charged-particle-beam microlithography apparatus and methods, and semiconductor-device manufacturing methods comprising same
08/13/2002US6433342 Coated wafer holding pin
08/13/2002US6433339 Surface state monitoring method and apparatus
08/13/2002US6433337 Method for detecting carrier profile
08/13/2002US6433314 Direct temperature control for a component of a substrate processing chamber
08/13/2002US6433301 Beam shaping and projection imaging with solid state UV Gaussian beam to form vias
08/13/2002US6433298 Plasma processing apparatus
08/13/2002US6433297 Plasma processing method and plasma processing apparatus
08/13/2002US6433287 Connection structure
08/13/2002US6433285 Printed wiring board, IC card module using the same, and method for producing IC card module
08/13/2002US6433277 Plastic integrated circuit package and method and leadframe for making the package
08/13/2002US6432849 Substrate storage cassette positioning device and method
08/13/2002US6432848 Process for formation of cap layer for semiconductor
08/13/2002US6432847 Method of activating P-type compound semiconductor by using lasers for reducing the resistivity thereof
08/13/2002US6432846 Heat resistance, waterproofing; plasma vapor deposition
08/13/2002US6432845 Semiconductor device and method for manufacturing the same
08/13/2002US6432844 Implanted conductor and methods of making
08/13/2002US6432843 Methods of manufacturing integrated circuit devices in which a spin on glass insulation layer is dissolved so as to recess the spin on glass insulation layer from the upper surface of a pattern
08/13/2002US6432842 Foaming insulating film under low pressure, drying, semiconductor; vacuum bubbles decrease relative dielectric constant
08/13/2002US6432841 Contacting silicon substrate with gas mixture of nitrogen and nitrogen oxide; low pressure plasma vapor deposition
08/13/2002US6432840 Methodology of removing misplaced encapsulant for attachment of heat sinks in a chip on board package
08/13/2002US6432839 Film forming method and manufacturing method of semiconductor device
08/13/2002US6432838 Process control; gas supply line, sample manifold, gas analyzing
08/13/2002US6432837 Processing a semiconductor wafer sliced from a monocrystalline ingot, comprising at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning, wherein etching step comprises first stage and second stage etching
08/13/2002US6432836 Cleaning method for semiconductor substrate and cleaning solution
08/13/2002US6432835 Fine pattern; anisotropic etching
08/13/2002US6432834 Method for enhancing etch selectivity of metal silicide film to polysilicon film, and method for etching stacked film of metal silicide film and polysilicon film
08/13/2002US6432833 Method of forming a self aligned contact opening
08/13/2002US6432832 Method of improving the profile angle between narrow and wide features
08/13/2002US6432831 Gas distribution apparatus for semiconductor processing
08/13/2002US6432830 Cleaning using reducing gas
08/13/2002US6432829 Process for making planarized silicon fin device
08/13/2002US6432828 Mixture containing oxidizer, complexing agent and abrasive
08/13/2002US6432827 ILD planarization method
08/13/2002US6432826 Cleaning using mixture of water, acid and ammonium hydroxide
08/13/2002US6432825 Semiconductor device production method
08/13/2002US6432824 Method for manufacturing a semiconductor wafer
08/13/2002US6432822 Method of improving electromigration resistance of capped Cu
08/13/2002US6432821 Method of copper electroplating
08/13/2002US6432820 Overcoating with metal using vacuum deposition, oxidation
08/13/2002US6432819 Method and apparatus of forming a sputtered doped seed layer
08/13/2002US6432818 Method of using tantalum-aluminum-nitrogen material as diffusion barrier and adhesion layer in semiconductor devices
08/13/2002US6432817 Tungsten silicide barrier for nickel silicidation of a gate electrode
08/13/2002US6432816 Protective film for protecting device isolation film is formed on the device isolation film for contact hole formation process, thereby preventing device isolation film from being damaged due to misalignment in lithography process
08/13/2002US6432815 Method of cleaning a silicon substrate after blanket depositing a tungsten film by dipping in a solution having hydrofluoric acid, hydrochloric acid, and/or ammonium hydroxide prior to patterning the tungsten film
08/13/2002US6432814 Method of manufacturing an interconnect structure having a passivation layer for preventing subsequent processing reactions
08/13/2002US6432813 Semiconductor processing method of forming insulative material over conductive lines
08/13/2002US6432812 Method of coupling capacitance reduction
08/13/2002US6432811 Method of forming structural reinforcement of highly porous low k dielectric films by Cu diffusion barrier structures
08/13/2002US6432810 Method of making dual damascene structure
08/13/2002US6432809 Method for improved passive thermal flow in silicon on insulator devices
08/13/2002US6432808 Method of improved bondability when using fluorinated silicon glass
08/13/2002US6432807 Method of forming solder bumps on a semiconductor device using bump transfer plate
08/13/2002US6432806 Method of forming bumps and template used for forming bumps
08/13/2002US6432805 Co-deposition of nitrogen and metal for metal silicide formation
08/13/2002US6432804 Sputtered silicon target for fabrication of polysilicon thin film transistors
08/13/2002US6432803 Semiconductor device and method of fabricating the same