Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2002
08/20/2002US6437463 Wafer positioner with planar motor and mag-lev fine stage
08/20/2002US6437455 Semiconductor device having gate-gate, drain-drain, and drain-gate connecting layers and method of fabricating the same
08/20/2002US6437454 Semiconductor base material having fine dot mark
08/20/2002US6437453 Wire bonding method, semiconductor device, circuit board, electronic instrument and wire bonding device
08/20/2002US6437452 Substrate having vias with pre-formed leads connecting semiconductor to substrate circuitry; for use in high density, high performance semiconductor packaging; low cost
08/20/2002US6437450 Method of mounting semiconductor chip
08/20/2002US6437448 Semiconductor device adapted for mounting on a substrate
08/20/2002US6437446 Semiconductor device having first and second chips
08/20/2002US6437445 Niobium-near noble metal contact structures for integrated circuits
08/20/2002US6437444 Interlayer dielectric with a composite dielectric stack
08/20/2002US6437443 Multiphase low dielectric constant material and method of deposition
08/20/2002US6437441 Wiring structure of a semiconductor integrated circuit and a method of forming the wiring structure
08/20/2002US6437440 Thin film metal barrier for electrical interconnections
08/20/2002US6437434 Semiconductor device and semiconductor device mounting interconnection board
08/20/2002US6437432 Semiconductor device having improved electrical characteristics and method of producing the same
08/20/2002US6437430 Semiconductor apparatus and frame used for fabricating the same
08/20/2002US6437428 Ball grid array type semiconductor package having a flexible substrate
08/20/2002US6437426 Semiconductor integrated circuit having an improved grounding structure
08/20/2002US6437425 Semiconductor devices which utilize low K dielectrics
08/20/2002US6437424 Non-volatile semiconductor memory device with barrier and insulating films
08/20/2002US6437423 Method for fabricating semiconductor components with high aspect ratio features
08/20/2002US6437421 Self-aligned dual-base semiconductor process and structure incorporating multiple bipolar device types
08/20/2002US6437420 Semiconductor elements for semiconductor device
08/20/2002US6437419 Emitter ballast resistor with enhanced body effect to improve the short circuit withstand capability of power devices
08/20/2002US6437418 High quality factor, integrated inductor and production method thereof
08/20/2002US6437417 Method for making shallow trenches for isolation
08/20/2002US6437416 Semiconductor structure having a planar junction termination with high breakdown voltage and low parasitic capacitance
08/20/2002US6437411 Semiconductor device having chamfered silicide layer and method for manufacturing the same
08/20/2002US6437409 Semiconductor device
08/20/2002US6437408 Plasma damage protection cell using floating N/P/N and P/N/P structure
08/20/2002US6437406 Super-halo formation in FETs
08/20/2002US6437405 Silicon-on-insulator (SOI) substrate, method for fabricating SOI substrate and SOI MOSFET using the SOI substrate
08/20/2002US6437404 Semiconductor-on-insulator transistor with recessed source and drain
08/20/2002US6437403 Semiconductor device
08/20/2002US6437402 Power MOS transistor
08/20/2002US6437401 Structure and method for improved isolation in trench storage cells
08/20/2002US6437400 Shallow trench isolation on a silicon substrate using nitrogen implant into the side wall
08/20/2002US6437399 Semiconductor structures with trench contacts
08/20/2002US6437398 One-time UV-programmable non-volatile semiconductor memory and method of programming such a semiconductor memory
08/20/2002US6437397 Flash memory cell with vertically oriented channel
08/20/2002US6437396 Nonvolatile memory
08/20/2002US6437395 Process for the manufacturing of an electrically programmable non-volatile memory device
08/20/2002US6437394 Non-volatile semiconductor memory device with reduced line resistance and method of manufacturing
08/20/2002US6437393 Non-volatile memory cell with silicided contacts
08/20/2002US6437392 Germanium (ge), titanium (ti), and zirconium (zr) or hafnium (hf) oxides; for use in capacitors, transistors, and integrated circuits for random access memory; high dielectric constants and low leakage currents
08/20/2002US6437391 Capacitor for semiconductor devices
08/20/2002US6437389 Vertical gate transistors in pass transistor programmable logic arrays
08/20/2002US6437388 Compact trench capacitor memory cell with body contact
08/20/2002US6437387 Memory cell with a stacked capacitor
08/20/2002US6437386 Method for creating thick oxide on the bottom surface of a trench structure in silicon
08/20/2002US6437385 Integrated circuit capacitor
08/20/2002US6437383 Dual trench isolation for a phase-change memory cell and method of making same
08/20/2002US6437382 Semiconductor device and manufacturing method thereof
08/20/2002US6437381 Semiconductor memory device with reduced orientation-dependent oxidation in trench structures
08/20/2002US6437380 Ferroelectric device with bismuth tantalate capping layer and method of making same
08/20/2002US6437379 Integrated circuit device providing isolation between adjacent regions
08/20/2002US6437378 Charge coupled devices including charge signal amplifiers therein
08/20/2002US6437377 Low dielectric constant sidewall spacer using notch gate process
08/20/2002US6437376 Heterojunction bipolar transistor (HBT) with three-dimensional base contact
08/20/2002US6437374 Semiconductor device and method of forming a semiconductor device
08/20/2002US6437372 Diffusion barrier spikes for III-V structures
08/20/2002US6437371 Layered dielectric on silicon carbide semiconductor structures
08/20/2002US6437370 Image sensor structure and manufacturing process therefor
08/20/2002US6437369 Method of forming dynamic random access memory circuitry and dynamic random access memory
08/20/2002US6437368 Thin film transistor
08/20/2002US6437367 Electro-optical device and method for driving the same
08/20/2002US6437366 Insulated gate semiconductor device and process for fabricating the same
08/20/2002US6437365 Raised tungsten plug antifuse and fabrication processes
08/20/2002US6437355 Apparatus for judging whether bump height is proper or not
08/20/2002US6437353 Particle-optical apparatus and process for the particle-optical production of microstructures
08/20/2002US6437352 Charged particle beam projection lithography with variable beam shaping
08/20/2002US6437351 Method and apparatus for controlling a workpiece in a vacuum chamber
08/20/2002US6437350 Methods and apparatus for adjusting beam parallelism in ion implanters
08/20/2002US6437347 Target locking system for electron beam lithography
08/20/2002US6437313 Method for forming a semiconductor device having a semiconductor film with a height difference
08/20/2002US6437304 Steam generator
08/20/2002US6437296 Alignment apparatus of the substrate for LCD
08/20/2002US6437284 Optical system and apparatus for laser heat treatment and method for producing semiconductor devices by using the same
08/20/2002US6437253 Terminal structure to which an electronic component is to be bonded
08/20/2002US6437240 Microelectronic connections with liquid conductive elements
08/20/2002US6437007 Aerogel thin film formation from multi-solvent systems
08/20/2002US6436851 Method for spin coating a high viscosity liquid on a wafer
08/20/2002US6436850 Method of degassing low k dielectric for metal deposition
08/20/2002US6436849 Method for manufacturing semiconductor device having low dielectric constant insulating film, wafer processing equipment and wafer storing box used in this method
08/20/2002US6436848 Advantageous exothermic reaction of nitrous oxide (n2o) in the torch chamber of an oxidizing apparatus
08/20/2002US6436847 Methods to form electronic devices
08/20/2002US6436846 Combined preanneal/oxidation step in dram technologies; simultaneously forms a denuded zone and a pad oxide of a given thickness by a single rtp process; eliminates need to strip an oxide layer of uncontrollable thickness prior to pad nitride
08/20/2002US6436845 Thinner silicon nitride-based gate insulator and analog linear transistors with a relatively thicker silicon dioxide gate insulator;
08/20/2002US6436844 Semiconductor structure useful in a self-aligned contact etch and method for making same
08/20/2002US6436843 System and method for coating substrates using ink jet technology
08/20/2002US6436842 Semiconductor wafer including a dot mark of a peculiar shape and method of forming the dot mark
08/20/2002US6436841 Borderless contact,
08/20/2002US6436840 Metal gate with CVD amorphous silicon layer and a barrier layer for CMOS devices and method of making with a replacement gate process
08/20/2002US6436839 Increasing programming silicide process window by forming native oxide film on amourphous Si after metal etching
08/20/2002US6436838 Method of patterning lead zirconium titanate and barium strontium titanate
08/20/2002US6436837 Domed wafer reactor vessel window with reduced stress at atmospheric and above atmospheric pressures
08/20/2002US6436836 Method of fabricating a DRAM cell configuration
08/20/2002US6436835 Shallow trench isolation process, water soluble organic sulfonate or carboxylate ammonium salts, cerium oxide
08/20/2002US6436834 Abrasion accelerator enhances the removal rate of a dielectric layer by chelation in either an acidic or a basic medium; methyl glycinate, glycinamide, aminoguanidine, semicarbazide, guanidine, urea, formamidine, acetamidine, formamide,
08/20/2002US6436833 Method for pre-STI-CMP planarization using poly-si thermal oxidation