| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 08/27/2002 | US6440845 Method of fabricating interconnect of capacitor |
| 08/27/2002 | US6440844 Semiconductor device with copper wiring and its manufacture method |
| 08/27/2002 | US6440843 Semiconductor device and method for manufacturing the same |
| 08/27/2002 | US6440842 Method of forming a dual damascene structure by patterning a sacrificial layer to define the plug portions of the structure |
| 08/27/2002 | US6440841 Method of fabricating vias |
| 08/27/2002 | US6440840 Damascene process to eliminate copper defects during chemical-mechanical polishing (CMP) for making electrical interconnections on integrated circuits |
| 08/27/2002 | US6440839 Selective air gap insulation |
| 08/27/2002 | US6440838 Dual damascene structure employing laminated intermediate etch stop layer |
| 08/27/2002 | US6440837 Method of forming a contact structure in a semiconductor device |
| 08/27/2002 | US6440836 Method for forming solder bumps on flip chips and devices formed |
| 08/27/2002 | US6440835 Method of connecting a conductive trace to a semiconductor chip |
| 08/27/2002 | US6440833 Method of protecting a copper pad structure during a fuse opening procedure |
| 08/27/2002 | US6440832 Hybrid MOS and schottky gate technology |
| 08/27/2002 | US6440831 Ionized metal plasma deposition process having enhanced via sidewall coverage |
| 08/27/2002 | US6440830 Metal-oxide-semiconductor field effect transistors (mosfets) having copper metallization on a polysilicon gate |
| 08/27/2002 | US6440829 N-profile engineering at the poly/gate oxide and gate oxide/SI interfaces through NH3 annealing of a layered poly/amorphous-silicon structure |
| 08/27/2002 | US6440828 Process of fabricating semiconductor device having low-resistive contact without high temperature heat treatment |
| 08/27/2002 | US6440827 Method for fabricating a semiconductor component having a wiring which runs piecewise in the substrate, and also a semiconductor component which can be fabricated by this method |
| 08/27/2002 | US6440826 NiSi contacting extensions of active regions |
| 08/27/2002 | US6440825 Method of controlling outdiffusion in a doped three-dimensional film |
| 08/27/2002 | US6440824 Method of crystallizing a semiconductor thin film, and method of manufacturing a thin-film semiconductor device |
| 08/27/2002 | US6440823 Low defect density (Ga, Al, In)N and HVPE process for making same |
| 08/27/2002 | US6440822 Method of manufacturing semiconductor device with sidewall metal layers |
| 08/27/2002 | US6440821 Method and apparatus for aligning wafers |
| 08/27/2002 | US6440820 Process flow for ARS mover using selenidation wafer bonding after processing a media side of a rotor wafer |
| 08/27/2002 | US6440819 Method for differential trenching in conjunction with differential fieldox growth |
| 08/27/2002 | US6440818 Method of reducing leakage current of a semiconductor wafer |
| 08/27/2002 | US6440817 Methods of forming integrated circuitry |
| 08/27/2002 | US6440816 Alignment mark fabrication process to limit accumulation of errors in level to level overlay |
| 08/27/2002 | US6440815 Dielectric capacitor and its manufacturing method |
| 08/27/2002 | US6440814 Electrostatic discharge protection for sensors |
| 08/27/2002 | US6440813 Process of manufacturing a DRAM cell capacitor having increased trench capacitance |
| 08/27/2002 | US6440812 Angled implant to improve high current operation of bipolar transistors |
| 08/27/2002 | US6440811 Utilizing existing polysilicon and masking steps |
| 08/27/2002 | US6440810 Method in the fabrication of a silicon bipolar transistor |
| 08/27/2002 | US6440809 Method of preventing fluorine ions from residing in a gate to result in boron ion penetration into a gate oxide |
| 08/27/2002 | US6440808 Damascene-gate process for the fabrication of MOSFET devices with minimum poly-gate depletion, silicided source and drain junctions, and low sheet resistance gate-poly |
| 08/27/2002 | US6440807 Surface engineering to prevent EPI growth on gate poly during selective EPI processing |
| 08/27/2002 | US6440806 Method for producing metal-semiconductor compound regions on semiconductor devices |
| 08/27/2002 | US6440805 Method of forming a semiconductor device with isolation and well regions |
| 08/27/2002 | US6440804 Static random access memory manufacturing method |
| 08/27/2002 | US6440803 Method of fabricating a mask ROM with raised bit-line on each buried bit-line |
| 08/27/2002 | US6440802 Process for fabricating semiconductor device and photolithography mask |
| 08/27/2002 | US6440801 Structure for folded architecture pillar memory cell |
| 08/27/2002 | US6440800 Method to form a vertical transistor by selective epitaxial growth and delta doped silicon layers |
| 08/27/2002 | US6440799 Semiconductor structures, methods of implanting dopants into semiconductor structures and methods of forming CMOS constructions |
| 08/27/2002 | US6440798 Method of forming a mixed-signal circuit embedded NROM memory and MROM memory |
| 08/27/2002 | US6440797 Nitride barrier layer for protection of ONO structure from top oxide loss in a fabrication of SONOS flash memory |
| 08/27/2002 | US6440796 Poly spacer split gate cell with extremely small cell size |
| 08/27/2002 | US6440795 Hemispherical grained silicon on conductive nitride |
| 08/27/2002 | US6440794 Method for forming an array of DRAM cells by employing a self-aligned adjacent node isolation technique |
| 08/27/2002 | US6440793 Vertical MOSFET |
| 08/27/2002 | US6440792 DRAM technology of storage node formation and no conduction/isolation process of bottle-shaped deep trench |
| 08/27/2002 | US6440791 Self aligned bit-line contact opening and node contact opening fabrication process |
| 08/27/2002 | US6440790 Method of making semiconductor device having an insulating film positioned between two similarly shaped conductive films |
| 08/27/2002 | US6440789 Photoresist spacer process simplification to eliminate the standard polysilicon or oxide spacer process for flash memory circuits |
| 08/27/2002 | US6440788 Implant sequence for multi-function semiconductor structure and method |
| 08/27/2002 | US6440787 Manufacturing method of semiconductor device |
| 08/27/2002 | US6440785 Method of manufacturing a semiconductor device utilizing a laser annealing process |
| 08/27/2002 | US6440784 Thin film transistor and a fabricating method thereof |
| 08/27/2002 | US6440783 Method for fabricating a thin film transistor display |
| 08/27/2002 | US6440782 Radiation-hard silicon cryo-CMOS process suitable for charge-coupled devices, and a device made according to this process |
| 08/27/2002 | US6440781 Method of adding bias-independent aluminum bridged anti-fuses to a tungsten plug process |
| 08/27/2002 | US6440780 Method of layout for LSI |
| 08/27/2002 | US6440778 Optical semiconductor element package and manufacturing method thereof |
| 08/27/2002 | US6440777 Method of depositing a thermoplastic polymer in semiconductor fabrication |
| 08/27/2002 | US6440774 Electronic device, method of manufacturing the same, and apparatus for manufacturing the same |
| 08/27/2002 | US6440772 Bow resistant plastic semiconductor package and method of fabrication |
| 08/27/2002 | US6440771 Method for constructing a wafer interposer by using conductive columns |
| 08/27/2002 | US6440769 Photovoltaic device with optical concentrator and method of making the same |
| 08/27/2002 | US6440765 Method for fabricating an infrared-emitting light-emitting diode |
| 08/27/2002 | US6440764 Cooling a metalorganic vapor phase epitaxy (movpe) deposited, as-containing, p-type contact layer |
| 08/27/2002 | US6440763 Methods for manufacture of self-aligned integrally gated nanofilament field emitter cell and array |
| 08/27/2002 | US6440760 Method of measuring etched state of semiconductor wafer using optical impedence measurement |
| 08/27/2002 | US6440758 Method for fabricating semiconductor laser device by aligning semiconductor laser chips based on light emission measurements |
| 08/27/2002 | US6440756 Reduction of plasma charge-induced damage in microfabricated devices |
| 08/27/2002 | US6440754 Thin film ferroelectric capacitors having improved memory retention through the use of essentially smooth bottom electrode structures |
| 08/27/2002 | US6440753 Metal hard mask for ILD RIE processing of semiconductor memory devices to prevent oxidation of conductive lines |
| 08/27/2002 | US6440752 Passivation layer by annealing the structure in an oxygen atmosphere to form an oxide layer on the top electrode; platinum, iridium, aluminum, titanium |
| 08/27/2002 | US6440751 Method of manufacturing thin film and thin film capacitor |
| 08/27/2002 | US6440646 Positive resist composition suitable for lift-off technique and pattern forming method |
| 08/27/2002 | US6440641 Deposited thin film build-up layer dimensions as a method of relieving stress in high density interconnect printed wiring board substrates |
| 08/27/2002 | US6440640 Thin resist with transition metal hard mask for via etch application |
| 08/27/2002 | US6440638 Method and apparatus for resist planarization |
| 08/27/2002 | US6440636 Polymeric compound and resin composition for photoresist |
| 08/27/2002 | US6440635 Having both negative and positive characteristics with wider exposure dosage windows; glycoluril powderlink? crosslinker |
| 08/27/2002 | US6440632 Forming pattern; exposure to light |
| 08/27/2002 | US6440621 Method of detecting film defects using chemical exposure of photoresist films |
| 08/27/2002 | US6440620 Electron beam lithography focusing through spherical aberration introduction |
| 08/27/2002 | US6440614 Having drawn thereupon main pattern with specific arrangement that is transferred onto preset element formation area on wafer and additional pattern formed around main pattern to adjust exposure quantity; lithography |
| 08/27/2002 | US6440591 Ferroelectric thin film coated substrate, producing method thereof and capacitor structure element using thereof |
| 08/27/2002 | US6440570 Stable thin film oxide standard |
| 08/27/2002 | US6440550 Deposition of fluorosilsesquioxane films |
| 08/27/2002 | US6440504 Vacuum processing apparatus having first means for evacuating vacuum vessel from atmospheric pressure to vacuum and second means for evacuating inside of vacuum vessel during generation of plasma, and vessel is movable between them |
| 08/27/2002 | US6440495 Chemical vapor deposition of ruthenium films for metal electrode applications |
| 08/27/2002 | US6440382 Method for producing water for use in manufacturing semiconductors |
| 08/27/2002 | US6440326 Photoresist removing composition |
| 08/27/2002 | US6440320 Substrate processing method and apparatus |
| 08/27/2002 | US6440319 Method and apparatus for predicting process characteristics of polyurethane pads |
| 08/27/2002 | US6440295 Method for electropolishing metal on semiconductor devices |