| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
|---|
| 09/19/2002 | WO2002072913A1 Variable efficiency faraday shield |
| 09/19/2002 | WO2002072726A1 Cerium based abrasive material and abrasive material slurry, and method for producing cerium based abrasive material |
| 09/19/2002 | WO2002072714A1 Solutions and dispersions of organic semiconductors |
| 09/19/2002 | WO2002072343A1 Heat reflecting material and heating device using the material |
| 09/19/2002 | WO2002072286A1 Combined plasma/liquid cleaning of substrates |
| 09/19/2002 | WO2002072265A1 Penetrable cap |
| 09/19/2002 | WO2002063075A3 Methods for growth of relatively large step-free sic crystal surfaces |
| 09/19/2002 | WO2002061008A3 Alkali metal-containing polishing system and method |
| 09/19/2002 | WO2002060828A3 Apparatus and method for atmospheric pressure reactive atom plasma processing for shaping of damage free surfaces |
| 09/19/2002 | WO2002056346A3 Point contact for semiconductors and the production thereof |
| 09/19/2002 | WO2002056113A3 Method for producing an etching mask |
| 09/19/2002 | WO2002055259A3 Tantalum removal during chemical mechanical processing |
| 09/19/2002 | WO2002053273A3 Process and apparatus for blending and distributing a slurry solution |
| 09/19/2002 | WO2002050875A3 Heating configuration for use in thermal processing chambers |
| 09/19/2002 | WO2002044699A3 Method and device for determining the properties of an integrated circuit |
| 09/19/2002 | WO2002043152A3 Poly fuse rom |
| 09/19/2002 | WO2002043109A3 Method for producing a planar field effect transistor and a planar field effect transistor |
| 09/19/2002 | WO2002031869A3 Method and apparatus for processing thin metal layers |
| 09/19/2002 | WO2002029852A3 Charge-coupled image sensor comprising gate electrodes interconnected by shunt electrodes |
| 09/19/2002 | WO2002028585A3 Method for ablating points of contact (debumping) |
| 09/19/2002 | WO2002025742A3 Method for producing a semiconductor-metal contact through a dielectric layer |
| 09/19/2002 | WO2002019407A3 A method for spatial distribution of chemical groups on a semiconductor surface |
| 09/19/2002 | WO2002015277A9 Dense arrays and charge storage devices, and methods for making same |
| 09/19/2002 | WO2002011201A3 Method and device for producing connection substrates for electronic components |
| 09/19/2002 | WO2002009884A3 Methods for the lithographic deposition of materials containing nanoparticles |
| 09/19/2002 | WO2002001719A3 Method and apparatus for testing high performance circuits |
| 09/19/2002 | WO2002001421A3 Lock-step cursors for feature alignment |
| 09/19/2002 | WO2001099158A3 Collar formation by selective oxide deposition |
| 09/19/2002 | WO2001082370A9 Method for adjusting structures on a semiconductor substrate |
| 09/19/2002 | WO2001040884A9 Monitoring system for a conveying device that conveys flat articles, especially wafers |
| 09/19/2002 | WO2001017010A9 Disposable spacers for mosfet gate structure |
| 09/19/2002 | WO2000034550A3 Cvd processes using bi aryl |
| 09/19/2002 | WO2000034549A3 Cvd process using bi alcoxides |
| 09/19/2002 | US20020133797 Method of and apparatus for determining an optimal solution to a uniform-density layout problem, and medium on which a program for determining the solution is stored |
| 09/19/2002 | US20020133750 Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits |
| 09/19/2002 | US20020133690 Semiconductor integrated circuit |
| 09/19/2002 | US20020133388 Assistance method and apparatus |
| 09/19/2002 | US20020133260 Operating method of vacuum processing system and vacuum processing system |
| 09/19/2002 | US20020133258 Nitrogen doping of FSG layer |
| 09/19/2002 | US20020133257 Operating method of vacuum processing system and vacuum processing system |
| 09/19/2002 | US20020133256 Operating method of vacuum processing system and vacuum processing system |
| 09/19/2002 | US20020132908 Film forming composition, porous film and their preparation |
| 09/19/2002 | US20020132745 Non-corrosive cleaning composition for removing plasma etching residues |
| 09/19/2002 | US20020132744 Formulations including a 1,3-dicarbonyl compound chelating agent and copper corrosion inhibiting agents for stripping residues from semiconductor substrates containing copper structures |
| 09/19/2002 | US20020132563 Polishing of semiconductor substrates |
| 09/19/2002 | US20020132562 Polish apparatus having a dresser and dresser adjusting method |
| 09/19/2002 | US20020132560 Polishing method for selective chemical mechanical polishing of semiconductor substrates |
| 09/19/2002 | US20020132559 Polishing apparatus |
| 09/19/2002 | US20020132498 Method of forming patterned thin film |
| 09/19/2002 | US20020132497 Substrate processing apparatus and method for manufacturing semiconductor device |
| 09/19/2002 | US20020132496 For forming an integrated circuit |
| 09/19/2002 | US20020132494 Retardant improves uniformity of the deposited film,thickness and smoothness, while lowering the carbon loss during said reaction;decreased sensitivity to minor changes in temperature, pressure, and flow rates |
| 09/19/2002 | US20020132493 Method to reduce charge interface traps and channel hot carrier degradation |
| 09/19/2002 | US20020132492 Method of fabricating a semiconductor device using two chemical mechanical polishing processes to polish regions having different conductive pattern densities |
| 09/19/2002 | US20020132491 Method of removing photoresist material with dimethyl sulfoxide |
| 09/19/2002 | US20020132489 Method for fabricating a capacitor by using self-aligned etaching process |
| 09/19/2002 | US20020132488 Method of etching tantalum |
| 09/19/2002 | US20020132487 Wafer processing apparatus and wafer processing method using the same |
| 09/19/2002 | US20020132486 Nitride open etch process based on trifluoromethane and sulfur hexafluoride |
| 09/19/2002 | US20020132485 Method for using a hard mask for critical dimension growth containment |
| 09/19/2002 | US20020132484 Method for fabricating electrically insulating layers |
| 09/19/2002 | US20020132483 Methods of forming materials within openings, and methods of forming isolation regions |
| 09/19/2002 | US20020132482 Fluid pressure imprint lithography |
| 09/19/2002 | US20020132481 Tungsten deposition process |
| 09/19/2002 | US20020132480 Substrate processing apparatus and substrate processing method |
| 09/19/2002 | US20020132479 Adaptive plasma characterization system |
| 09/19/2002 | US20020132478 Method for selectively etching silicon and/or metal silicides |
| 09/19/2002 | US20020132476 Barrier layer associated with a conductor layer in damascene structures |
| 09/19/2002 | US20020132475 Chemistry for chemical vapor deposition of titanium containing films |
| 09/19/2002 | US20020132474 Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow |
| 09/19/2002 | US20020132473 Integrated barrier layer structure for copper contact level metallization |
| 09/19/2002 | US20020132472 Method for forming metal plug |
| 09/19/2002 | US20020132471 High modulus film structure for enhanced electromigration resistance |
| 09/19/2002 | US20020132470 Metal planarization system |
| 09/19/2002 | US20020132469 Method for forming metal wiring layer |
| 09/19/2002 | US20020132468 Structural reinforcement of highly porous low k dielectric films by Cu diffusion barrier structures |
| 09/19/2002 | US20020132467 Method of forming plugs and local interconnect for embedded memory/system-on-chip (SOC) applications |
| 09/19/2002 | US20020132466 Semiconductor device having reduced interconnect-line parasitic capacitance |
| 09/19/2002 | US20020132465 Reconfigurable integrated circuit memory |
| 09/19/2002 | US20020132464 Self-aligned MRAM contact and method of fabrication |
| 09/19/2002 | US20020132463 Semiconductor device and manufacturing method of the same |
| 09/19/2002 | US20020132461 Semiconductor device having bump electrodes with a stress dissipating structure and method of manufacturing the same |
| 09/19/2002 | US20020132460 Method and depositing a layer |
| 09/19/2002 | US20020132459 Method for making an access transistor |
| 09/19/2002 | US20020132458 Method for fabricating a MOS transistor of an embedded memory |
| 09/19/2002 | US20020132457 Method for avoiding the ion penetration with the plasma doping |
| 09/19/2002 | US20020132456 One-step process for forming titanium silicide layer on polysilicon |
| 09/19/2002 | US20020132455 Method for forming crystalline silicon layer and crystalline silicon semiconductor device |
| 09/19/2002 | US20020132454 Method of forming crystalline semiconductor thin film on base substrate, lamination formed with crystalline semiconductor thin film and color filter |
| 09/19/2002 | US20020132453 Method for fabricating III-V compound semiconductor |
| 09/19/2002 | US20020132452 Semiconductor device and method of manufacturing the same |
| 09/19/2002 | US20020132451 Semiconductor substrate and method of manufacturing the same |
| 09/19/2002 | US20020132450 Semiconductor device and method for producing the same, and anisotropic conductive circuit board |
| 09/19/2002 | US20020132449 Method for manufacturing a semiconductor film |
| 09/19/2002 | US20020132448 Method for fabricating SOI devices with option of incorporating air-gap feature for better insulation and performance |
| 09/19/2002 | US20020132447 Process for the production of electric part |
| 09/19/2002 | US20020132446 Process for fabricating a non-volatile memory device |
| 09/19/2002 | US20020132445 Method for manufacturing trench isolation type semiconductor device |
| 09/19/2002 | US20020132444 Bias current and method of fabricating semiconductor device |
| 09/19/2002 | US20020132443 Bonding of parts with dissimilar thermal expansion coefficients |