Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2002
09/24/2002US6456533 Higher program VT and faster programming rates based on improved erase methods
09/24/2002US6456532 Semiconductor memory device
09/24/2002US6456525 Short-tolerant resistive cross point array
09/24/2002US6456523 Ferromagnetic double quantum well tunnel magneto-resistance device
09/24/2002US6456522 Integrated memory having memory cells and buffer capacitors
09/24/2002US6456518 Bi-level digit line architecture for high density drams
09/24/2002US6456482 Microelectronic capacitor with capacitor plate layer formed of tungsten rich tungsten oxide material
09/24/2002US6456480 Processing apparatus and a processing method
09/24/2002US6456474 Semiconductor integrated circuit
09/24/2002US6456374 Exposure apparatus and a device manufacturing method using the same
09/24/2002US6456364 Semiconductor manufacturing apparatus, and device manufacturing method
09/24/2002US6456363 Exposure control apparatus and method
09/24/2002US6456362 Integrating waveguide for use in lithographic projection apparatus
09/24/2002US6456361 Method and instrument for measuring vacuum ultraviolet light beam, method of producing device and optical exposure apparatus
09/24/2002US6456360 Projection exposure apparatus and method
09/24/2002US6456183 Inductor for integrated circuit
09/24/2002US6456137 Semiconductor circuit, delay adjustment method therefor and layout method therefor
09/24/2002US6456117 Shield circuit and integrated circuit in which the shield circuit is used
09/24/2002US6456114 Power conserving CMOS semiconductor integrated circuit
09/24/2002US6456113 Scan flip-flop circuit having scan logic output terminal dedicated to scan test
09/24/2002US6456082 Method for polysilicon crystalline line width measurement post etch in undoped-poly process
09/24/2002US6456019 Real time measurement of leakage current in high voltage electron guns
09/24/2002US6456013 Thin film transistor and display device
09/24/2002US6456010 Discharge plasma generating method, discharge plasma generating apparatus, semiconductor device fabrication method, and semiconductor device fabrication apparatus
09/24/2002US6455982 Object levitating apparatus, an object transporting apparatus equipped with said apparatus, and an object levitating process
09/24/2002US6455956 Two-dimensional electric motor
09/24/2002US6455945 Semiconductor device having a fragment of a connection part provided on at least one lateral edge for mechanically connecting to adjacent semiconductor chips
09/24/2002US6455940 Semiconductor device including lead wiring protected by dual barrier films
09/24/2002US6455939 Substantially hillock-free aluminum-containing components
09/24/2002US6455937 Arrangement and method for improved downward scaling of higher conductivity metal-based interconnects
09/24/2002US6455934 Polymeric dielectric layers having low dielectric constants and improved adhesion to metal lines
09/24/2002US6455933 Underfill of a bumped or raised die utilizing a barrier adjacent to the side wall of flip chip
09/24/2002US6455926 High density cavity-up wire bond BGA
09/24/2002US6455921 Fabricating plug and near-zero overlap interconnect line
09/24/2002US6455920 Semiconductor device having a ball grid array and a fabrication process thereof
09/24/2002US6455919 Internally ballasted silicon germanium transistor
09/24/2002US6455918 Integrated circuitry
09/24/2002US6455917 Method of manufacturing semiconductor capacitor
09/24/2002US6455916 Integrated circuit devices containing isolated dielectric material
09/24/2002US6455915 Integrated inductive circuits
09/24/2002US6455912 Process for manufacturing shallow trenches filled with dielectric material having low mechanical stress
09/24/2002US6455911 Silicon-based semiconductor component with high-efficiency barrier junction termination
09/24/2002US6455906 Depositing tungsten silicide barrier layer on wordline stack, processing wordline stack such that tungsten nitride extrusions extend from exposed surface of barrier layer, selectively etching tungsten nitride extrusions
09/24/2002US6455904 Loadless static random access memory device and method of manufacturing same
09/24/2002US6455903 Dual threshold voltage MOSFET by local confinement of channel depletion layer using inert ion implantation
09/24/2002US6455901 Semiconductor integrated circuit
09/24/2002US6455900 Semiconductor device
09/24/2002US6455899 Semiconductor memory device having improved pattern of layers and compact dimensions
09/24/2002US6455898 Electrostatic discharge input protection for reducing input resistance
09/24/2002US6455897 Semiconductor device having electrostatic discharge protection circuit
09/24/2002US6455895 Overvoltage protector having same gate thickness as the protected integrated circuit
09/24/2002US6455894 Semiconductor device, method of manufacturing the same and method of arranging dummy region
09/24/2002US6455893 MOS transistor with high voltage sustaining capability and low on-state resistance
09/24/2002US6455892 Silicon carbide semiconductor device and method for manufacturing the same
09/24/2002US6455891 Semiconductor device and method for manufacturing the same
09/24/2002US6455890 Structure of fabricating high gate performance for NROM technology
09/24/2002US6455889 Semiconductor memory device having memory cells each having a conductive body of booster plate and a method for manufacturing the same
09/24/2002US6455888 Memory cell structure for elimination of oxynitride (ONO) etch residue and polysilicon stringers
09/24/2002US6455887 Nonvolatile devices with P-channel EEPROM device as injector
09/24/2002US6455886 Structure and process for compact cell area in a stacked capacitor cell array
09/24/2002US6455885 Inductor structure for high performance system-on-chip using post passivation process
09/24/2002US6455884 Radiation hardened semiconductor memory with active isolation regions
09/24/2002US6455883 Nonvolatile semiconductor memory
09/24/2002US6455882 Semiconductor device having a hydrogen barrier layer
09/24/2002US6455879 Low resistance contact semiconductor diode
09/24/2002US6455878 Semiconductor LED flip-chip having low refractive index underfill
09/24/2002US6455875 Thin film transistor having enhanced field mobility
09/24/2002US6455874 Thin film transistor and fabrication method thereof
09/24/2002US6455871 SiGe MODFET with a metal-oxide film and method for fabricating the same
09/24/2002US6455862 Lithographic projection apparatus
09/24/2002US6455821 System and method to control temperature of an article
09/24/2002US6455814 Backside heating chamber for emissivity independent thermal processes
09/24/2002US6455805 Tray mask plate for laser-trimming apparatus
09/24/2002US6455785 Bump connection with stacked metal balls
09/24/2002US6455783 Multilayer printed wiring board and method for manufacturing the same
09/24/2002US6455717 For forming films during preparation of semiconductor structures using chemical vapor deposition
09/24/2002US6455710 Method for the preparation of pure citalopram
09/24/2002US6455575 Phosphonooxymethyl ethers of taxane derivatives
09/24/2002US6455479 Stripping composition
09/24/2002US6455446 High-temperature high-pressure processing method for semiconductor wafers, and an anti-oxidizing body used for the method
09/24/2002US6455445 Silicone polymer insulation film on semiconductor substrate and method for forming the film
09/24/2002US6455444 Semiconductor device having a multilayer interconnection structure
09/24/2002US6455443 Method of fabricating low-dielectric constant interlevel dielectric films for BEOL interconnects with enhanced adhesion and low-defect density
09/24/2002US6455441 Sputtered insulating layer for wordline stacks
09/24/2002US6455440 Method for preventing polysilicon stringer in memory device
09/24/2002US6455439 Method of forming a mask
09/24/2002US6455438 Fabrication method for a semiconductor device
09/24/2002US6455437 Method and apparatus for monitoring the process state of a semiconductor device fabrication process
09/24/2002US6455436 Method of fabricating semiconductor device
09/24/2002US6455435 Method for fabricating a wiring plane on a semiconductor chip with an antifuse
09/24/2002US6455434 Prevention of slurry build-up within wafer topography during polishing
09/24/2002US6455433 Method for forming square-shouldered sidewall spacers and devices fabricated
09/24/2002US6455432 Method for removing carbon-rich particles adhered on a copper surface
09/24/2002US6455431 Descumming organic residue from semiconductor having patterned photoresist layer in manner which does not impact critical dimension of patterned layer by contacting with plasma etchant where reactive plasma species are generated from ammonia
09/24/2002US6455430 Method of embedding contact hole by damascene method
09/24/2002US6455429 Method of producing large-area membrane masks
09/24/2002US6455428 Method of forming a metal silicide layer
09/24/2002US6455427 Method for forming void-free metallization in an integrated circuit
09/24/2002US6455426 Method for making a semiconductor device having copper conductive layers
09/24/2002US6455425 Selective deposition process for passivating top interface of damascene-type Cu interconnect lines