| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 09/26/2002 | US20020137361 Phase shifting mask for manufacturing semiconductor device and method of fabricating the same |
| 09/26/2002 | US20020137360 Spinning-on an addition polymer layer on a semiconductor device, thepolymer layer comprising unsaturated compounds; treating with an ammonia-containing gas |
| 09/26/2002 | US20020137359 Ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device containing the same |
| 09/26/2002 | US20020137358 Multiple point support assembly for a stage |
| 09/26/2002 | US20020137357 Composition and method for cleaning residual debris from semiconductor surfaces |
| 09/26/2002 | US20020137356 Integration of the process of plasma nitridation, the deposition of tungsten nitride, and the filling of tungsten plug in one chamber; depositing a tungsten layer on said titanium nitride passivation in the same chamber; etching |
| 09/26/2002 | US20020137355 Process for forming uniform multiple contact holes |
| 09/26/2002 | US20020137354 Plasma etcher with heated ash chamber base |
| 09/26/2002 | US20020137353 Method and device for delacquering an area on a mask substrate |
| 09/26/2002 | US20020137352 Selectively delignifying lignocellulosic materials and bleaching of pulp and dyes using a combination of an oxidative enzyme and a metal complex |
| 09/26/2002 | US20020137351 Method of etching semiconductor metallic layer |
| 09/26/2002 | US20020137350 Process of manufacturing electron microscopic sample and process of analyzing semiconductor device |
| 09/26/2002 | US20020137349 Monolithic low dielectric constant platform for passive components and method |
| 09/26/2002 | US20020137348 Electrochemical etching process |
| 09/26/2002 | US20020137346 Workpiece distribution and processing in a high throughput stacked frame |
| 09/26/2002 | US20020137345 Gate resistance reduction |
| 09/26/2002 | US20020137344 Etched substrate |
| 09/26/2002 | US20020137342 Method of manufacturing nitride semiconductor substrate |
| 09/26/2002 | US20020137341 Method for manufacturing dual-spacer structure |
| 09/26/2002 | US20020137340 Plasma etching method for semiconductor device and etching apparatus of the same |
| 09/26/2002 | US20020137339 Semiconductor device and manufacturing method thereof |
| 09/26/2002 | US20020137338 Method for depositing copper films having controlled morphology and semiconductor wafers produced thereby |
| 09/26/2002 | US20020137337 Use of a sacrificial layer to facilitate metallization for small features |
| 09/26/2002 | US20020137336 Method for forming a tungsten silicide layer |
| 09/26/2002 | US20020137335 Methods of chemical vapor depositing ruthenium by varying chemical vapor deposition parameters |
| 09/26/2002 | US20020137334 Process for producing semiconductor and apparatus for production |
| 09/26/2002 | US20020137333 Method for fabricating an integrated circuit with a dynamic memory cell configuration (DRAM) with a long retention time |
| 09/26/2002 | US20020137332 Microelectronic interconnect material with adhesion promotion layer and fabrication method |
| 09/26/2002 | US20020137331 Using photolithography |
| 09/26/2002 | US20020137330 Ultra large scale integration, ULSI; Having a layer of chromium oxide (CrO) |
| 09/26/2002 | US20020137329 Method for fabricating a barrier layer |
| 09/26/2002 | US20020137328 Semiconductor device and manufacturing method thereof |
| 09/26/2002 | US20020137327 Semiconductor device and manufacturing method thereof. |
| 09/26/2002 | US20020137326 Method for manufacturing a low-profile semiconductor device |
| 09/26/2002 | US20020137325 Method for forming bumps |
| 09/26/2002 | US20020137324 Ball transferring method and apparatus |
| 09/26/2002 | US20020137323 Metal ion diffusion barrier layers |
| 09/26/2002 | US20020137322 Reduced mask count process for manufacture of mosgated device |
| 09/26/2002 | US20020137321 Method of forming a metal gate electrode |
| 09/26/2002 | US20020137319 Two chemical mechanical polishing steps are carried out on the metal layer and barrier layer, first slurry polishes the metal layer and a second slurry contains oxidant to adjust the metal's zeta potential |
| 09/26/2002 | US20020137318 Field effect transistor structure and method of manufacture |
| 09/26/2002 | US20020137317 High K dielectric film and method for making |
| 09/26/2002 | US20020137316 Manufacture of probe unit having lead probes extending beyong edge of substrate |
| 09/26/2002 | US20020137315 Method for depositing a tungsten silicide layer |
| 09/26/2002 | US20020137314 Method for forming ultra-shallow junction by boron plasma doping |
| 09/26/2002 | US20020137313 Method for producing semiconductor wafer and semiconductor wafer |
| 09/26/2002 | US20020137311 Within atomic layer or chemical vapor deposition reactors , delivering a purge gas in a sleeve surrounding a conductor associated with an electric heating assembly for a wafer so that the purge gas envelopes the electrical conductor in the sleeve and escapes from an unsealed end into an exhaust system |
| 09/26/2002 | US20020137310 Method and apparatus for fabricating a semiconductor device |
| 09/26/2002 | US20020137309 Release sheet and a protective film forming layer of a thermosetting or energy ray-curable component and binder component formed on a detachable surface of the release sheet |
| 09/26/2002 | US20020137308 Trench with buried plate and method for its production |
| 09/26/2002 | US20020137307 Method for forming isolation layer of semiconductor device |
| 09/26/2002 | US20020137306 Method for forming polysilicon-filled trench isolations |
| 09/26/2002 | US20020137305 Fabrication method of shallow trench isolation |
| 09/26/2002 | US20020137304 Method of reworking bump |
| 09/26/2002 | US20020137302 Method of manufacturing semiconductor device |
| 09/26/2002 | US20020137301 Method for fabricating an integrated ferroelectric semiconductor memory and integrated ferroelectric semiconductor memory |
| 09/26/2002 | US20020137300 Thermally stable polycrystal to single crystal electrical contact structure |
| 09/26/2002 | US20020137299 Method for reducing the gate induced drain leakage current |
| 09/26/2002 | US20020137298 Semiconductor device |
| 09/26/2002 | US20020137297 Method of manufacturing semiconductor device |
| 09/26/2002 | US20020137296 Twin monos cell fabrication method and array organization |
| 09/26/2002 | US20020137295 Salicide field effect transistors with improved borderless contact structures and a method of fabrication |
| 09/26/2002 | US20020137294 Methods of forming field effect transistors and related field effect transistors constructions |
| 09/26/2002 | US20020137293 Pair of first sidewall spacers formed on opposite sides of a gate electrode over a semiconductor substrate, and then a pair of second sidewall spacers is formed, each on one side of each first sidewall spacer |
| 09/26/2002 | US20020137292 High voltage metal oxide device with enhanced well region |
| 09/26/2002 | US20020137291 Manufacture of trench-gate semiconductor devices |
| 09/26/2002 | US20020137290 Semiconductor device and method of manufacturing the same |
| 09/26/2002 | US20020137289 Method of manufacturing flash memory |
| 09/26/2002 | US20020137288 Non-volatile semiconductor memory device and process for fabricating the same |
| 09/26/2002 | US20020137287 Semiconductor device including insulated gate field effect transistors and method of manufacturing the same |
| 09/26/2002 | US20020137286 Dual floating gate programmable read only memory cell structure and method for its fabrication and operation |
| 09/26/2002 | US20020137285 Semiconductor device including transistor with composite gate structure and transistor with single gate structure, and method for manufacturing the same |
| 09/26/2002 | US20020137284 Tungsten gate MOS transistor and memory cell and method of making same |
| 09/26/2002 | US20020137283 Method of fabricating flash memory with shallow and deep junctions |
| 09/26/2002 | US20020137282 Manufacturing method for isolation on non-volatile memory |
| 09/26/2002 | US20020137281 Semiconductor integrated circuitry and method for manufacturing the circuitry |
| 09/26/2002 | US20020137280 Method of fabricating an integrated circuit configuration with at least one capacitor |
| 09/26/2002 | US20020137279 Semiconductor device having trench isolation |
| 09/26/2002 | US20020137278 Memory with trench capacitor and selection transistor and method for fabricating it |
| 09/26/2002 | US20020137277 Semiconductor device having a reduced-capacitance conductive layer and fabrication method for the same |
| 09/26/2002 | US20020137276 Method for forming contact having low resistivity using porous plug and method for forming semiconductor devices using the same |
| 09/26/2002 | US20020137275 Memory structure with thin film transistor and method for fabricating the same |
| 09/26/2002 | US20020137274 Lower electrode, a dielectric layer formed on the lower electrode of a titanium tantalum oxynitride, and an upper electrode; capacitor; increased storage capacitance, preventing leakage current |
| 09/26/2002 | US20020137273 Integrated circuit devices including a resistor pattern and methods for manufacturing the same |
| 09/26/2002 | US20020137272 Efficient fabrication process for dual well type structures |
| 09/26/2002 | US20020137271 Flash memory with ultra thin vertical body transistors |
| 09/26/2002 | US20020137270 Method of fabricating a flash memory device |
| 09/26/2002 | US20020137269 Method for forming raised structures by controlled selective epitaxial growth of facet using spacer |
| 09/26/2002 | US20020137268 Method of forming silicide contacts and device incorporation same |
| 09/26/2002 | US20020137267 Method for crystallizing a silicon layer and fabricating a TFT using the same |
| 09/26/2002 | US20020137266 Low temperature polycrystalline silicon type thin film transistor and a method of the thin film transistor fabrication |
| 09/26/2002 | US20020137265 Method of fabricating a semiconductor device |
| 09/26/2002 | US20020137264 Method of fabrication thin wafer IGBT |
| 09/26/2002 | US20020137263 Dispensing process for fabrication of microelectronic packages |
| 09/26/2002 | US20020137260 Depositing colloidal suspension, drying and infiltrating with a liquid phase matrix material, such as a spin-on polymer, followed by curing, to provide an etch resistant dielectric |
| 09/26/2002 | US20020137259 Method for forming semiconductor device |
| 09/26/2002 | US20020137257 Substrate of semiconductor package |
| 09/26/2002 | US20020137255 One-step semiconductor stack packaging method |
| 09/26/2002 | US20020137254 Semiconductor device and method for fabricating the same |
| 09/26/2002 | US20020137250 High K dielectric film and method for making |