| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
|---|
| 09/24/2002 | US6455424 Selective cap layers over recessed polysilicon plugs |
| 09/24/2002 | US6455423 Direct writing of low carbon conductive material |
| 09/24/2002 | US6455422 Densification process hillock suppression method in integrated circuits |
| 09/24/2002 | US6455421 Plasma treatment of tantalum nitride compound films formed by chemical vapor deposition |
| 09/24/2002 | US6455420 Method of forming a compound film of a semiconductor and a metal by self-alignment |
| 09/24/2002 | US6455419 System and method of forming a tungsten plug |
| 09/24/2002 | US6455418 Barrier for copper metallization |
| 09/24/2002 | US6455417 Method for forming damascene structure employing bi-layer carbon doped silicon nitride/carbon doped silicon oxide etch stop layer |
| 09/24/2002 | US6455416 Using developer soluble antireflective coating containing dye facilitates formation of trenches directly over (accurately aligned) previously formed vias and minimizes accumulation of resist contaminants in vias upon developing trench mask |
| 09/24/2002 | US6455415 Using low dielectric material results in semiconductor structure that is free of silicon nitride or oxide in copper interconnect region and which comprises copper interconnect structure that overcomes undesirable copper diffusion |
| 09/24/2002 | US6455413 Pre-fill CMP and electroplating method for integrated circuits |
| 09/24/2002 | US6455412 Semiconductor contact via structure and method |
| 09/24/2002 | US6455411 Defect and etch rate control in trench etch for dual damascene patterning of low-k dielectrics |
| 09/24/2002 | US6455410 Semiconductor device and method of manufacturing the same |
| 09/24/2002 | US6455409 Damascene processing using a silicon carbide hard mask |
| 09/24/2002 | US6455408 Method for manufacturing semiconductor devices having redistribution patterns with a concave pattern in a bump pad area |
| 09/24/2002 | US6455407 Forming a contact opening by forming a contact opening over a first insulator over a node where electrical contact is desired, filling the contact opening with second insulator, etching a second contact opening through both insulators |
| 09/24/2002 | US6455406 Semiconductor processing method of forming a conductive connection through WxSiyNz material with specific contact opening etching |
| 09/24/2002 | US6455405 Using implantation method to control gate oxide thickness on dual oxide semiconductor devices |
| 09/24/2002 | US6455404 Semiconductor device and method for fabricating same |
| 09/24/2002 | US6455403 Shallow trench contact structure to solve the problem of schottky diode leakage |
| 09/24/2002 | US6455402 Method of forming retrograde doping file in twin well CMOS device |
| 09/24/2002 | US6455401 Methodology for producing thin film semiconductor devices by crystallizing an amorphous film with crystallization promoting material, patterning the crystallized film, and then increasing the crystallinity with an irradiation |
| 09/24/2002 | US6455400 Semiconductor processing methods of forming silicon layers |
| 09/24/2002 | US6455399 Smoothing method for cleaved films made using thermal treatment |
| 09/24/2002 | US6455398 Silicon on III-V semiconductor bonding for monolithic optoelectronic integration |
| 09/24/2002 | US6455397 Method of producing strained microelectronic and/or optical integrated and discrete devices |
| 09/24/2002 | US6455396 SOI semiconductor device capable of preventing floating body effect |
| 09/24/2002 | US6455395 Method of fabricating silicon structures including fixtures for supporting wafers |
| 09/24/2002 | US6455394 Method for trench isolation by selective deposition of low temperature oxide films |
| 09/24/2002 | US6455393 Air bridge/dielectric fill inductors |
| 09/24/2002 | US6455391 Method of forming structures with buried regions in a semiconductor device |
| 09/24/2002 | US6455390 Method of manufacturing hetero-junction bipolar transistor |
| 09/24/2002 | US6455389 Method for preventing a by-product ion moving from a spacer |
| 09/24/2002 | US6455388 Method of manufacturing metal-oxide semiconductor transistor |
| 09/24/2002 | US6455387 Semiconductor device and method of manufacturing the same |
| 09/24/2002 | US6455386 High and low voltage transistor manufacturing method |
| 09/24/2002 | US6455385 Semiconductor fabrication with multiple low dose implant |
| 09/24/2002 | US6455384 Method for forming MOSFET device having source/drain extension regions located underlying L shaped spacers |
| 09/24/2002 | US6455383 Methods of fabricating scaled MOSFETs |
| 09/24/2002 | US6455382 Multi-step method for forming sacrificial silicon oxide layer |
| 09/24/2002 | US6455381 Method of manufacturing a semiconductor device having a trench isolation structure |
| 09/24/2002 | US6455380 Semiconductor device and method for fabricating the same |
| 09/24/2002 | US6455379 Power trench transistor device source region formation using silicon spacer |
| 09/24/2002 | US6455378 Method of manufacturing a trench gate power transistor with a thick bottom insulator |
| 09/24/2002 | US6455377 Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs) |
| 09/24/2002 | US6455376 Method of fabricating flash memory with shallow and deep junctions |
| 09/24/2002 | US6455375 Eeprom tunnel window for program injection via P+ contacted inversion |
| 09/24/2002 | US6455374 Method of manufacturing flash memory device |
| 09/24/2002 | US6455373 Semiconductor device having gate edges protected from charge gain/loss |
| 09/24/2002 | US6455372 Nucleation for improved flash erase characteristics |
| 09/24/2002 | US6455371 Method for forming capacitor of a DRAM having a wall protection structure |
| 09/24/2002 | US6455370 Method of patterning noble metals for semiconductor devices by electropolishing |
| 09/24/2002 | US6455369 Method for fabricating a trench capacitor |
| 09/24/2002 | US6455368 Semiconductor memory device having bitlines of common height |
| 09/24/2002 | US6455367 Method of making high density semiconductor memory |
| 09/24/2002 | US6455366 Method of forming a junction region in a semiconductor device |
| 09/24/2002 | US6455365 Structural integrity enhancement of dielectric films |
| 09/24/2002 | US6455364 Semiconductor device and method for fabricating the same |
| 09/24/2002 | US6455363 System to improve ser immunity and punchthrough |
| 09/24/2002 | US6455362 Double LDD devices for improved dram refresh |
| 09/24/2002 | US6455361 Semiconductor device and manufacturing method of the same |
| 09/24/2002 | US6455360 Method for forming crystalline semiconductor layers, a method for fabricating thin film transistors, and a method for fabricating solar cells and active matrix liquid crystal devices |
| 09/24/2002 | US6455359 Laser-irradiation method and laser-irradiation device |
| 09/24/2002 | US6455357 Thin film transistor and method of fabricating the same |
| 09/24/2002 | US6455353 Method of making semiconductor packages at wafer level |
| 09/24/2002 | US6455350 Methods and apparatus for manufacturing ball grid array semiconductor device packages |
| 09/24/2002 | US6455349 Method and apparatus for filling a gap between spaced layers of a semiconductor |
| 09/24/2002 | US6455348 Lead frame, resin-molded semiconductor device, and method for manufacturing the same |
| 09/24/2002 | US6455342 Semiconductor device, its manufacturing method and substrate for manufacturing a semiconductor device |
| 09/24/2002 | US6455335 Semiconductor device and manufacturing method thereof including a probe test step and a burn-in test step |
| 09/24/2002 | US6455333 Conditioning etch chamber with volatilized polymeric material to reduce chamber wall effects on etchant, etching pilot wafer, verifying optimum conditioning, and if conditioning is acceptable, etching product wafer, otherwise reconditioning |
| 09/24/2002 | US6455331 Process of top-surface-metallurgy plate-up bonding and rewiring for multilayer devices |
| 09/24/2002 | US6455330 Methods to create high-k dielectric gate electrodes with backside cleaning |
| 09/24/2002 | US6455329 Method for fabricating a capacitor in a semiconductor device |
| 09/24/2002 | US6455328 Method of manufacture of a capacitor with a dielectric on the basis of strontium-bismuth-tantalum |
| 09/24/2002 | US6455327 Method of manufacturing a ferroelectric capacitor |
| 09/24/2002 | US6455326 Enhanced process capability for sputtered ferroelectric films using low frequency pulsed DC and RF power supplies |
| 09/24/2002 | US6455233 Exposing defined area of maskless resist material to produce chemical change in property of area so it can be selectively removed or rendered inert with high energy beam of light ions having energy greater than 250 kev |
| 09/24/2002 | US6455232 Method of reducing stop layer loss in a photoresist stripping process using a fluorine scavenger |
| 09/24/2002 | US6455228 Integrally layered body comprising substrate, water insoluble antireflection film, photoresist layer comprising alkali soluble resin, onium salt photoacid generator and substituted glycoluril compound, water soluble antireflection coating film |
| 09/24/2002 | US6455227 Structure comprising at least three resist layers laid one upon another, with absorption layer capable of absorbing beams for exposure sandwiched between each two resist layers, and at least one absorption layer is comprised of amorphous carbon |
| 09/24/2002 | US6455226 Polymer formed by polymerizing mixture of norbornylene and maleic anhydride derivative, reducing polymer with reducing agent, reacting with hydroxy protecting group precursor |
| 09/24/2002 | US6455225 Photoresist monomers having stability to post exposure delay, polymers thereof and photoresist compositions containing the same |
| 09/24/2002 | US6455205 Method and apparatus for determining phase shifts and trim masks for an integrated circuit |
| 09/24/2002 | US6455204 X-ray mask and method of fabricating the same |
| 09/24/2002 | US6455203 Performing multiple exposure process on coated substrate so that latent images are superimposed on substrate, developing and etching exposed substrate to produce actual mask patterns |
| 09/24/2002 | US6455130 Nanoporous dielectric films with graded density and process for making such films |
| 09/24/2002 | US6455106 Method of forming oxide-ceramics film |
| 09/24/2002 | US6455099 Method and device for applying sealant to IC having bumps |
| 09/24/2002 | US6455098 Wafer processing apparatus and method |
| 09/24/2002 | US6454987 Micro structure and its manufacture method |
| 09/24/2002 | US6454964 Metal polyoxyalkylated precursor solutions in an octane solvent and method of making the same |
| 09/24/2002 | US6454957 Ruthenium and ruthenium dioxide removal method and material |
| 09/24/2002 | US6454956 Structuring method |
| 09/24/2002 | US6454927 Electrodeposition |
| 09/24/2002 | US6454920 Magnetron sputtering source |
| 09/24/2002 | US6454919 Physical vapor deposition apparatus with deposition and DC target power control |
| 09/24/2002 | US6454918 Cup type plating apparatus |
| 09/24/2002 | US6454914 Ferroelectric capacitor and a method for manufacturing thereof |