Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2003
03/13/2003WO2003021659A1 Methods and apparatus for etching metal layers on substrates
03/13/2003WO2003021658A1 Method and apparatus for treating organosiloxane coating
03/13/2003WO2003021657A1 Substrate treating device and substrate treating method
03/13/2003WO2003021656A2 Improved material for use with ferroelectrics
03/13/2003WO2003021655A2 Method of cleaning an inter-level dielectric interconnect
03/13/2003WO2003021653A1 Plasma cleaning gas and plasma cleaning method
03/13/2003WO2003021652A1 Method for etching object to be processed
03/13/2003WO2003021651A1 Polishing fluid for metallic film and method for producing semiconductor substrate using the same
03/13/2003WO2003021650A1 Film forming method
03/13/2003WO2003021649A1 Apparatus and method for producing semiconductor device, and method for cleaning semiconductor producing apparatus
03/13/2003WO2003021648A1 Chemical surface deposition of ultra-thin semiconductors
03/13/2003WO2003021647A1 Heat treatment device, and heat treatment method
03/13/2003WO2003021646A1 Treatment system
03/13/2003WO2003021645A2 Wafer engine
03/13/2003WO2003021644A1 Chamber shields for a plasma chamber
03/13/2003WO2003021643A2 Semiconductor material handling system
03/13/2003WO2003021642A2 Method and apparatus for processing a wafer
03/13/2003WO2003021641A2 Method and apparatus for sensing a wafer in a carrier
03/13/2003WO2003021640A2 Method for semiconductor gate doping
03/13/2003WO2003021639A2 Trench fet with self aligned source and contact
03/13/2003WO2003021636A2 Electronic devices and methods of manufacture
03/13/2003WO2003021633A1 Field-effect transistor with horizontal self-aligned gates and the production method therefor
03/13/2003WO2003021630A1 Method and apparatus for tuning ion implanters
03/13/2003WO2003021615A1 Thin film capacity element-use composition, high-permittivity insulation film, thin film capacity element and thin film multilayer capacitor
03/13/2003WO2003021613A2 Electromechanical memory array using nanotube ribbons and method for making same
03/13/2003WO2003021606A1 Composition for thin-film capacitive device, high-dielectric constant insulating film, thin-film capacitive device, and thin-film mulitlayer ceramic capacitor
03/13/2003WO2003021601A1 Non-volatile memory device
03/13/2003WO2003021579A1 Magnetic material structures, devices and methods
03/13/2003WO2003021499A1 Integrated circuit chip design
03/13/2003WO2003021360A2 Phase-shift-moire focus monitor
03/13/2003WO2003021002A1 Apparatus and method for plasma processing
03/13/2003WO2003020816A1 Fluxing compositions
03/13/2003WO2003020634A2 A method of fabrication of a sensor
03/13/2003WO2003020497A1 Free-standing (al, ga, in)n and parting method for forming same
03/13/2003WO2003020449A1 System for removing deposited material from within a semiconductor fabrication device
03/13/2003WO2003002990A3 Using scatterometry to develop real time etch image
03/13/2003WO2003001601A3 Spacer etch mask for sonos memory
03/13/2003WO2003001574A3 Double-sided semiconductor structures utilizing a compliant substrate
03/13/2003WO2002103797A3 High-voltage integrated cmos circuit
03/13/2003WO2002103751A3 Electroplating chemistry for the cu filling of submicron features of vlsi/ulsi interconnect
03/13/2003WO2002101820A3 Conductor track arrangement and method for production of an encapsulated conductor coupling
03/13/2003WO2002099482A3 Oscillating reference signal generator
03/13/2003WO2002097899A3 Integrated tunable capacitor
03/13/2003WO2002095815A3 Time-based semiconductor material attachment
03/13/2003WO2002093642A3 Integrated sensor packaging and methods of making the same
03/13/2003WO2002089196A3 Trench-gate semiconductor devices and their manufacture
03/13/2003WO2002089177A3 A contact structure of a wiring line and method manufacturing the same, and thin film transistor array substrate including the contact structure and method manufacturing the same
03/13/2003WO2002084712A3 Rapid thermal processing system for integrated circuits
03/13/2003WO2002082499A3 Conductive collar surrounding semiconductor workpiece in plasma chamber
03/13/2003WO2002080260A9 Deposition method, deposition apparatus, insulating film and semiconductor integrated circuit
03/13/2003WO2002078084A3 Method for producing ferroelectric memory cells
03/13/2003WO2002078062A3 Acoustic detection of dechucking and apparatus therefor
03/13/2003WO2002073667A3 Formation of a frontside contact on silicon-on-insulator substrate
03/13/2003WO2002071476A3 Method of forming conductive interconnections in porous insulating films and associated device
03/13/2003WO2002069385A3 Arrangement with a chip comprising an integrated circuit and a support or a support element
03/13/2003WO2002069375A3 Trench condenser and method for production thereof
03/13/2003WO2002065512A3 Process for etching organic low-k materials
03/13/2003WO2002063676A3 A slot via filled dual damascene structure without middle stop layer and method for making the same
03/13/2003WO2002058112A3 Copper diffusion barriers
03/13/2003WO2002058108A3 Wafer applied fluxing and underfill material, and layered electronic assemblies manufactured therewith
03/13/2003WO2002056376A3 Method of integrating a heat spreader and a semiconductor, and package formed thereby
03/13/2003WO2002055392A3 Apparatus and method for transporting a container
03/13/2003WO2002054467A3 Semiconductor structure including a monocrystalline conducting layer
03/13/2003WO2002050908A3 Gate length control for semiconductor chip design
03/13/2003WO2002050614A3 Structure and method of correcting proximity effects in a tri-tone attenuated phase-shifting mask
03/13/2003WO2002045135A3 Method for thermally treating substrates
03/13/2003WO2002043119A3 An ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device, a method for fabricating the same, and an electronic device containing the same
03/13/2003WO2002041392A3 Conductor chemical-mechanical polishing in integrated circuit interconnects
03/13/2003WO2002041389A3 A method for monitoring line width of electronic circuit patterns
03/13/2003WO2002039501A3 Method for producing trench capacitors
03/13/2003WO2002037552A3 Doping for flash memory cell
03/13/2003WO2002031217B1 Sputter targets
03/13/2003WO2002029886A3 Method and apparatus for substrate surface inspection using spectral profiling techniques
03/13/2003WO2002029885A3 Optical signal routing method and apparatus providing multiple inspection collection points on semiconductor manufacturing systems
03/13/2003WO2002029884A3 Detection of process endpoint through monitoring fluctuation of output data
03/13/2003WO2002029860A3 Wafer cleaning module and method for cleaning the surface of a substrate
03/13/2003WO2002025376A3 Oxime derivatives and the use thereof as latent acids
03/13/2003WO2002009156A8 Temperature-controlled thermal platform for automated testing
03/13/2003WO2002003763B1 Vacuum plasma processor apparatus and method
03/13/2003WO2001078115A3 Barrier coating for vitreous materials
03/13/2003WO2001073870A3 Integrated capacitor-like battery and associated method
03/13/2003WO2001073617A8 Method for the surface optimisation of components in integrated circuits
03/13/2003WO2000074552A3 Method for determinig alert window parameters for etc signal delivery
03/13/2003WO2000066480A3 Edge gripping end effector wafer handling apparatus
03/13/2003US20030051225 Method for generating mask data, masks, recording media, and method for manufacturing semiconductor devices
03/13/2003US20030051222 Integrated circuit chip design
03/13/2003US20030051221 Master slice type in which various logic circuits are formed by commonly carrying out product steps except a wiring step, and changing only the wiring step
03/13/2003US20030051220 Logical circuit delay optimization system
03/13/2003US20030051218 Method for designing wiring connecting section and semiconductor device
03/13/2003US20030051198 Electronic circuit and method for testing
03/13/2003US20030051091 Latched sense amplifiers as high speed memory in a memory system
03/13/2003US20030051035 Control system for in-situ feeding back a polish profile
03/13/2003US20030050761 Inspection method and its apparatus, inspection system
03/13/2003US20030050724 Low-bias-deposited high-density-plasma chemical-vapor-deposition silicate glass layers
03/13/2003US20030050005 Article storage system for a clean room
03/13/2003US20030049994 Method for polishing a liquid crystal display
03/13/2003US20030049993 Semiconductor polishing apparatus and method of detecting end point of polishing semiconductor
03/13/2003US20030049945 Interconnection structure and method for designing the same
03/13/2003US20030049944 Methods of treating dielectric materials with oxygen, and methods of forming capacitor constructions
03/13/2003US20030049943 Method of forming a metal oxide film
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