Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2003
03/18/2003US6534834 Polysilicon bounded snapback device
03/18/2003US6534832 Display device and glass member and substrate member having film comprising aluminum, nitrogen and oxygen
03/18/2003US6534831 Semiconductor integrated circuit device
03/18/2003US6534830 Low impedance VDMOS semiconductor component
03/18/2003US6534829 Semiconductor device and method for fabricating the same
03/18/2003US6534828 Integrated circuit device including a deep well region and associated methods
03/18/2003US6534827 MOS transistor
03/18/2003US6534826 Semiconductor device and manufacturing method thereof
03/18/2003US6534824 Self-aligned punch through stop for 6F2 rotated hybrid DRAM cell
03/18/2003US6534822 Silicon on insulator field effect transistor with a double Schottky gate structure
03/18/2003US6534821 Structure with protruding source in split-gate flash
03/18/2003US6534820 Integrated dynamic memory cell having a small area of extent, and a method for its production
03/18/2003US6534819 Dense backplane cell for configurable logic
03/18/2003US6534817 Contactless channel write/erase flash memory cell and its fabrication method
03/18/2003US6534816 Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell
03/18/2003US6534815 Semiconductor device with stack electrode formed using HSG growth
03/18/2003US6534814 Method of manufacturing a semiconductor memory device having a trench capacitor with sufficient capacitance and small junction leak current
03/18/2003US6534813 Semiconductor device having a self-aligned contact structure and methods of forming the same
03/18/2003US6534812 Memory cell with stored charge on its gate and a resistance element having non-linear resistance elements
03/18/2003US6534811 DRAM cell with high integration density
03/18/2003US6534810 Semiconductor memory device having capacitor structure formed in proximity to corresponding transistor
03/18/2003US6534809 Hardmask designs for dry etching FeRAM capacitor stacks
03/18/2003US6534807 Local interconnect junction on insulator (JOI) structure
03/18/2003US6534804 Semiconductor device
03/18/2003US6534803 Electronic device, semiconductor device, and electrode forming method
03/18/2003US6534802 Method for reducing base to collector capacitance and related structure
03/18/2003US6534801 GaN-based high electron mobility transistor
03/18/2003US6534795 Semiconductor light-emitting element
03/18/2003US6534791 Epitaxial aluminium-gallium nitride semiconductor substrate
03/18/2003US6534790 Compound semiconductor field effect transistor
03/18/2003US6534789 Thin film transistor matrix having TFT with LDD regions
03/18/2003US6534788 Thin film transistor having dual gate structure and a fabricating method thereof
03/18/2003US6534787 Asymmetrical MOS channel structure with drain extension
03/18/2003US6534786 Testing
03/18/2003US6534785 Reduced terminal testing system
03/18/2003US6534784 Metal-oxide electron tunneling device for solar energy conversion
03/18/2003US6534775 Electrostatic trap for particles entrained in an ion beam
03/18/2003US6534766 Charged particle beam system and pattern slant observing method
03/18/2003US6534752 Spatially resolved temperature measurement and irradiance control
03/18/2003US6534751 Wafer heating apparatus and ceramic heater, and method for producing the same
03/18/2003US6534750 Heat treatment unit and heat treatment method
03/18/2003US6534749 Thermal process apparatus for measuring accurate temperature by a radiation thermometer
03/18/2003US6534748 Different voltages
03/18/2003US6534744 Method for manufacturing a display device
03/18/2003US6534725 High-frequency circuit board and semiconductor device using the high-frequency circuit board
03/18/2003US6534710 Packaging and interconnection of contact structure
03/18/2003US6534616 Precursors for making low dielectric constant materials with improved thermal stability
03/18/2003US6534459 Resist residue remover
03/18/2003US6534458 Cleaning agent for a semi-conductor substrate
03/18/2003US6534424 Method of forming silicon nitride on a substrate
03/18/2003US6534422 Integrated ESD protection method and system
03/18/2003US6534421 Method to fabricate thin insulating film
03/18/2003US6534420 Methods for forming dielectric materials and methods for forming semiconductor devices
03/18/2003US6534419 Method and apparatus for reducing IC die mass and thickness while improving strength characteristics
03/18/2003US6534418 Use of silicon containing imaging layer to define sub-resolution gate structures
03/18/2003US6534417 Method and apparatus for etching photomasks
03/18/2003US6534416 Control of patterned etching in semiconductor features
03/18/2003US6534415 Method of removing polymer residues after tungsten etch back
03/18/2003US6534414 Dual-mask etch of dual-poly gate in CMOS processing
03/18/2003US6534413 Method to remove metal and silicon oxide during gas-phase sacrificial oxide etch
03/18/2003US6534412 Method for removing native oxide
03/18/2003US6534411 Method of high density plasma metal etching
03/18/2003US6534410 Method for forming conductor members, manufacturing method of semiconductor element and manufacturing method of thin-film magnetic head
03/18/2003US6534409 Silicon oxide co-deposition/etching process
03/18/2003US6534408 Utilization of disappearing silicon hard mask for fabrication of semiconductor structures
03/18/2003US6534407 Method for reducing dishing effects during a chemical mechanical polishing process
03/18/2003US6534406 Method for increasing inductance of on-chip inductors and related structure
03/18/2003US6534405 Method of forming a MOSFET device featuring a dual salicide process
03/18/2003US6534404 Method of depositing diffusion barrier for copper interconnect in integrated circuit
03/18/2003US6534403 Method of making a contact and via structure
03/18/2003US6534402 Method of fabricating self-aligned silicide
03/18/2003US6534401 Method for selectively oxidizing a silicon/metal composite film stack
03/18/2003US6534400 Method for depositing a tungsten silicide layer
03/18/2003US6534399 Dual damascene process using self-assembled monolayer
03/18/2003US6534398 Method of forming metal layer(s) and/or antireflective coating layer(s) on an integrated circuit
03/18/2003US6534397 Pre-treatment of low-k dielectric for prevention of photoresist poisoning
03/18/2003US6534396 Patterned conductor layer pasivation method with dimensionally stabilized planarization
03/18/2003US6534395 Method of forming graded thin films using alternating pulses of vapor phase reactants
03/18/2003US6534394 Process to create robust contacts and interconnects
03/18/2003US6534393 Method for fabricating local metal interconnections with low contact resistance and gate electrodes with improved electrical conductivity
03/18/2003US6534392 Methods of making microelectronic assemblies using bonding stage and bonding stage therefor
03/18/2003US6534390 Salicide method for producing a semiconductor device using silicon/amorphous silicon/metal structure
03/18/2003US6534389 Dual level contacts and method for forming
03/18/2003US6534388 Method to reduce variation in LDD series resistance
03/18/2003US6534387 Semiconductor device and method of manufacturing the same
03/18/2003US6534386 Method of manufacturing semiconductor chips
03/18/2003US6534385 Method of fusion for heteroepitaxial layers and overgrowth thereon
03/18/2003US6534384 Method for manufacturing SOI wafer including heat treatment in an oxidizing atmosphere
03/18/2003US6534383 Thin film formation process by clearing the implanted layer with laser radiation
03/18/2003US6534382 Process for producing semiconductor article
03/18/2003US6534381 Method for fabricating multi-layered substrates
03/18/2003US6534380 Semiconductor substrate and method of manufacturing the same
03/18/2003US6534379 Linerless shallow trench isolation method
03/18/2003US6534377 Capacitance elements and method of manufacturing the same
03/18/2003US6534376 Process flow for sacrificial collar scheme with vertical nitride mask
03/18/2003US6534375 Method of forming a capacitor in a semiconductor integrated circuit device using a metal silicon nitride layer to protect an underlying metal silicide layer from oxidation during subsequent processing steps
03/18/2003US6534374 Single damascene method for RF IC passive component integration in copper interconnect process
03/18/2003US6534373 MOS transistor with reduced floating body effect
03/18/2003US6534372 Method for fabricating a self-aligned emitter in a bipolar transistor
03/18/2003US6534371 C implants for improved SiGe bipolar yield
1 ... 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761 4762 4763 4764 4765 4766 4767 4768 4769 ... 6590