Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2003
03/06/2003US20030045123 Method for fabrication of a high capacitance interpoly dielectric
03/06/2003US20030045122 Nanolithography with pi-conjugated azo dyes and azo-metal complexes
03/06/2003US20030045121 Fabrication method and wafer structure of semiconductor device using low-k film
03/06/2003US20030045120 Photoelectrochemical undercut etching of semiconductor material
03/06/2003US20030045119 Method for forming a bottle-shaped trench
03/06/2003US20030045118 Method for controlling the critical dimension of the polysilicon gate by etching the hard mask
03/06/2003US20030045117 Contacting an etched precision surface with a liquid or supercritical carbon dioxide and an acid having a pKa of less than about 4 under thermodynamic conditions consistent with the retention of said liquid or supercritical CO2
03/06/2003US20030045116 Flash step preparatory to dielectric etch
03/06/2003US20030045115 Method of cleaning an inter-level dielectric interconnect
03/06/2003US20030045114 Plasma etching of dielectric layer with etch profile control
03/06/2003US20030045113 Fabrication method of semiconductor integrated circuit device
03/06/2003US20030045112 Ion implantation to induce selective etching
03/06/2003US20030045111 Methods of etching a contact opening over a node location on a semiconductor substrate
03/06/2003US20030045108 Method to prevent electrical shorts between adjacent metal lines
03/06/2003US20030045107 Chemical-mechanical-polishing station
03/06/2003US20030045105 Method for planarizing an isolating layer
03/06/2003US20030045104 Substrate processing method and substrate processing system
03/06/2003US20030045103 Nitride III-V compound semiconductor substrate, its manufacturing method, manufacturing method of a semiconductor light emitting device, and manufacturing method of a semiconductor device
03/06/2003US20030045102 Method of manufacturing compound single crystal
03/06/2003US20030045101 Convertible hot edge ring to improve low-K dielectric etch
03/06/2003US20030045100 In-situ method and apparatus for end point detection in chemical mechanical polishing
03/06/2003US20030045099 Method of forming a self-aligned contact hole
03/06/2003US20030045098 Method and apparatus for processing a wafer
03/06/2003US20030045096 Semiconductor device manufacturing method
03/06/2003US20030045095 Method for filling recessed micro-structures with metallization in the production of a microelectronic device
03/06/2003US20030045094 Method and apparatus for manufacturing semiconductor devices
03/06/2003US20030045092 Method of fabricating a semiconductor device having reduced contact resistance
03/06/2003US20030045091 Method of forming a contact for a semiconductor device
03/06/2003US20030045090 Method of manufacturing semiconductor device
03/06/2003US20030045089 Semiconductor wafer with improved flatness, and process for producing the semiconductor wafer
03/06/2003US20030045088 Method for manufacturing semiconductor integrated circuit device
03/06/2003US20030045087 Method of manufacturing semiconductor device
03/06/2003US20030045086 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
03/06/2003US20030045085 Thin-film circuit substrate and manufacturing method thereof, and a via formed substrate and manufacturing method thereof
03/06/2003US20030045084 Method of production of semiconductor module
03/06/2003US20030045082 Atomic layer deposition of metal oxide and/or low asymmetrical tunnel barrier interploy insulators
03/06/2003US20030045081 MOSFET having a stacked silicon structure and method
03/06/2003US20030045080 Gate structure and method
03/06/2003US20030045079 Method for manufacturing mask ROM
03/06/2003US20030045078 Highly reliable amorphous high-K gate oxide ZrO2
03/06/2003US20030045077 Method for manufacturing semiconductor device, and semiconductor device
03/06/2003US20030045076 Semiconductor device production method
03/06/2003US20030045075 Method of selective epitaxial growth for semiconductor devices
03/06/2003US20030045074 Method for semiconductor gate doping
03/06/2003US20030045073 Process for lapping wafer and method for processing backside of wafer using the same
03/06/2003US20030045072 Methods of thinning microelectronic workpieces
03/06/2003US20030045071 Method for fabricating semiconductor memory device
03/06/2003US20030045070 Method and device for forming an STI type isolation in a semiconductor device
03/06/2003US20030045069 Capacitor for use in an integrated circuit
03/06/2003US20030045068 Method of fabricating a trench-structure capacitor device
03/06/2003US20030045067 Semiconductor integrated circuit device and method of manufacturing the same
03/06/2003US20030045066 Method for fabricating a bipolar transistor having self-aligned emitter and base
03/06/2003US20030045065 Method of producing a semiconductor integrated circuit device and the semiconductor integrated circuit device
03/06/2003US20030045064 Semiconductor device comprising sense amplifier and manufacturing method thereof
03/06/2003US20030045063 Semiconductor device and method for manufacturing the same
03/06/2003US20030045062 Shallow junction formation
03/06/2003US20030045061 Method of forming a spacer
03/06/2003US20030045060 Crystalline or amorphous medium-k gate oxides, Y2O3 and Gd2O3
03/06/2003US20030045059 Method for fabricating a silicide layer of flat cell memory
03/06/2003US20030045058 Method of manufacturing a semiconductor device comprising MOS-transistors having gate oxides of different thicknesses
03/06/2003US20030045057 Method of making nonvolatile memory device having reduced capacitance between floating gate and substrate
03/06/2003US20030045056 Method for manufacturing a semiconductor memory
03/06/2003US20030045055 Method of fabricating a flash memory cell
03/06/2003US20030045053 Method for manufacturing semiconductor device
03/06/2003US20030045052 Method for fabricating a trench structure
03/06/2003US20030045051 Self-aligned STI process using nitride hard mask
03/06/2003US20030045050 Capacitors, methods of forming capacitors, and methods of forming capacitor dielectric layers
03/06/2003US20030045049 Method of forming chalcogenide comprising devices
03/06/2003US20030045048 Dielectric material forming methods and enhanced dielectric materials
03/06/2003US20030045047 Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods
03/06/2003US20030045046 Process for forming a diffusion barrier material nitride film
03/06/2003US20030045044 Package with integrated inductor and/or capacitor
03/06/2003US20030045043 Display device
03/06/2003US20030045042 Method of fabricating semiconductor device and semiconductor device
03/06/2003US20030045040 Method for the production of a field-effect structure and field-effect structure
03/06/2003US20030045039 Method of fabricating a semiconductor device having reduced contact resistance
03/06/2003US20030045038 Method of forming low-temperature polysilicon
03/06/2003US20030045037 Thin film transistor memory device
03/06/2003US20030045035 Novel edge termination structure for semiconductor devices
03/06/2003US20030045033 Method of manufacturing a semiconductor device
03/06/2003US20030045032 Leadframe, method of manufacturing the same, semiconductor device using the same, and method of manufacturing the device
03/06/2003US20030045031 Dicing method and dicing apparatus for dicing plate-like workpiece
03/06/2003US20030045030 Method of manufacturing a semiconductor device
03/06/2003US20030045029 Semiconductor device and method for manufacturing the same
03/06/2003US20030045028 Method for stress reduction in flip chip bump during flip chip mounting and underfill process steps of making a microelectronic assembly
03/06/2003US20030045027 Flip chip dip coating encapsulant
03/06/2003US20030045026 Method and apparatus for circuit completion through the use of ball bonds or other connections during the formation of semiconductor device
03/06/2003US20030045025 A plastic land-grid array package, a ball-grid array package, and a plastic leaded package or micromechanical components are fabricated
03/06/2003US20030045024 Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device
03/06/2003US20030045023 Method of fabricating package having metal runner
03/06/2003US20030045022 6730577 not granted per USPTO
03/06/2003US20030045019 Method of fabrication of a micro-channel based integrated sensor for chemical and biological materials
03/06/2003US20030045018 Semiconductor structure comprising substrate with antireflective coating comprising metal silicon nitride compound, metal being selected from scandium and cobalt, configured to minimize reflectivity of deep ultraviolet light
03/06/2003US20030045017 Method for fabricating III-V Group compound semiconductor
03/06/2003US20030045015 Flip-chip bonding of light emitting devices and light emitting devices suitable for flip-chip bonding
03/06/2003US20030045014 Optical device and manufacturing method thereof
03/06/2003US20030045009 Method of monitoring and/or controlling a semiconductor manufacturing apparatus and a system therefor
03/06/2003US20030045008 Method and apparatus for monitoring changes in the surface of a workpiece during processing
03/06/2003US20030045007 Method of monitoring and/or controlling a semiconductor manufacturing apparatus and a system therefor
03/06/2003US20030045006 Capacitor constructions comprising perovskite-type dielectric materials, and methods of forming capacitor constructions comprising perovskite-type dielectric materials
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