Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2003
03/11/2003US6531757 Defect detected is cut by a laser beam
03/11/2003US6531755 Semiconductor device and manufacturing method thereof for realizing high packaging density
03/11/2003US6531754 Manufacturing method of partial SOI wafer, semiconductor device using the partial SOI wafer and manufacturing method thereof
03/11/2003US6531753 Embedded conductor for SOI devices using a buried conductive layer/conductive plug combination
03/11/2003US6531751 Semiconductor device with increased gate insulator lifetime
03/11/2003US6531750 Shallow junction transistors which eliminating shorts due to junction spiking
03/11/2003US6531749 Field effect transistor having a two layered gate electrode
03/11/2003US6531747 Driver transistor including a gate electrode is formed on the surface of a p well of a silicon substrate, silicon oxide and a silicon nitride film are formed to cover the driver transistor; static random access memory
03/11/2003US6531746 Semiconductor device with high-speed switching circuit implemented by MIS transistors and process for fabrication thereof
03/11/2003US6531744 Integrated circuit provided with overvoltage protection and method for manufacture thereof
03/11/2003US6531743 SOI MOS field effect transistor and manufacturing method therefor
03/11/2003US6531742 Method of forming CMOS device
03/11/2003US6531741 Dual buried oxide film SOI structure and method of manufacturing the same
03/11/2003US6531739 Radiation-hardened silicon-on-insulator CMOS device, and method of making the same
03/11/2003US6531738 High voltage SOI semiconductor device
03/11/2003US6531737 Semiconductor device having an improved interlayer contact and manufacturing method thereof
03/11/2003US6531736 Semiconductor device and method of manufacturing thereof
03/11/2003US6531735 Semiconductor integrated circuit
03/11/2003US6531734 Self-aligned split-gate flash memory cell having an integrated source-side erase structure and its contactless flash memory arrays
03/11/2003US6531733 Structure of flash memory cell and method for manufacturing the same
03/11/2003US6531732 Nonvolatile semiconductor memory device, process of manufacturing the same and method of operating the same
03/11/2003US6531731 Integration of two memory types on the same integrated circuit
03/11/2003US6531730 Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same
03/11/2003US6531729 Semiconductor device and method for fabricating the same
03/11/2003US6531728 Oxide etching method and structures resulting from same
03/11/2003US6531727 Open bit line DRAM with ultra thin body transistors
03/11/2003US6531726 Lead zirconate titanate; conductive oxide film of a metal sputtered on said ferroelectric film
03/11/2003US6531725 Pinned photodiode structure in a 3T active pixel sensor
03/11/2003US6531724 Borderless gate structures
03/11/2003US6531723 Magnetoresistance random access memory for improved scalability
03/11/2003US6531722 InGaAs on the collector layer, an InP layer on the base layer, and an emitter contact layer made of InGaAs
03/11/2003US6531721 Structure for a heterojunction bipolar transistor
03/11/2003US6531720 Dual sidewall spacer for a self-aligned extrinsic base in SiGe heterojunction bipolar transistors
03/11/2003US6531718 Semiconductor device
03/11/2003US6531716 Group-III nitride semiconductor light-emitting device and manufacturing method for the same
03/11/2003US6531715 Multilayer contact electrode for compound semiconductors and production method thereof
03/11/2003US6531714 Silicon oxycarbide
03/11/2003US6531713 Electro-optical device and manufacturing method thereof
03/11/2003US6531710 SOI film formed by laser annealing
03/11/2003US6531709 Semiconductor wafer and fabrication method of a semiconductor chip
03/11/2003US6531686 Chuck plate of ashing equipment for fabricating semiconductor devices and chuck assembly comprising the same
03/11/2003US6531681 Apparatus having line source of radiant energy for exposing a substrate
03/11/2003US6531678 Method for processing ceramic green sheet and laser beam machine used therefor
03/11/2003US6531664 Controlling height of solder connections, and preventing shorting between adjacent connections
03/11/2003US6531654 Semiconductor thin-film formation process, and amorphous silicon solar-cell device
03/11/2003US6531436 Corrosion inhibitor of catechol, benzotriazole, 2-mercaptobenzimidazole, gallic acid or their derivatives; polar aprotic solvent and base; electronics, thin film heads
03/11/2003US6531416 Method for heat treatment of silicon wafer and silicon wafer heat-treated by the method
03/11/2003US6531415 Silicon nitride furnace tube low temperature cycle purge for attenuated particle formation
03/11/2003US6531414 Method of oxidizing strain-compensated superlattice of group III-V semiconductor
03/11/2003US6531413 Method for depositing an undoped silicate glass layer
03/11/2003US6531412 Method for low temperature chemical vapor deposition of low-k films using selected cyclosiloxane and ozone gases for semiconductor applications
03/11/2003US6531411 Surface roughness improvement of SIMOX substrates by controlling orientation of angle of starting material
03/11/2003US6531410 Intrinsic dual gate oxide MOSFET using a damascene gate process
03/11/2003US6531409 Fluorine containing carbon film and method for depositing same
03/11/2003US6531408 Method for growing ZnO based oxide semiconductor layer and method for manufacturing semiconductor light emitting device using the same
03/11/2003US6531407 Method, structure and process flow to reduce line-line capacitance with low-K material
03/11/2003US6531406 Method of fabricating a shallow trench isolation
03/11/2003US6531404 Method of etching titanium nitride
03/11/2003US6531403 Method of etching an object, method of repairing pattern, nitride pattern and semiconductor device
03/11/2003US6531402 Method for etching organic film, method for fabricating semiconductor device and pattern formation method
03/11/2003US6531401 Method of cleaning a substrate surface using a frozen material
03/11/2003US6531400 Process for manufacturing semiconductor integrated circuit device
03/11/2003US6531399 Polishing method
03/11/2003US6531398 Method of depositing organosillicate layers
03/11/2003US6531396 Method of fabricating a nickel/platinum monsilicide film
03/11/2003US6531395 Method for fabricating bitlines
03/11/2003US6531394 Method for forming gate electrode of semiconductor device
03/11/2003US6531393 Salicide integrated solution for embedded virtual-ground memory
03/11/2003US6531392 Method of forming a thin film transistor array panel using photolithography techniques
03/11/2003US6531391 Method of fabricating a conductive path in a semiconductor device
03/11/2003US6531390 Non-metallic barrier formations for copper damascene type interconnects
03/11/2003US6531389 Method for forming incompletely landed via with attenuated contact resistance
03/11/2003US6531388 Method of forming an aluminum film for use in manufacturing a semiconductor device
03/11/2003US6531387 Polishing of conductive layers in fabrication of integrated circuits
03/11/2003US6531386 Method to fabricate dish-free copper interconnects
03/11/2003US6531385 Method of forming metal/dielectric multi-layered interconnects
03/11/2003US6531384 Method of forming a bond pad and structure thereof
03/11/2003US6531383 Method for manufacturing a compound semiconductor device
03/11/2003US6531382 Use of a capping layer to reduce particle evolution during sputter pre-clean procedures
03/11/2003US6531381 Method and apparatus for cleaning semiconductor device and method of fabricating semiconductor device
03/11/2003US6531380 Method of fabricating T-shaped recessed polysilicon gate transistors
03/11/2003US6531379 High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe
03/11/2003US6531378 Method for processing wafer by applying layer to protect the backside during a tempering step and removing contaminated portions of the layer
03/11/2003US6531377 Method for high aspect ratio gap fill using sequential HDP-CVD
03/11/2003US6531376 Method of making a semiconductor device with a low permittivity region
03/11/2003US6531375 Method of forming a body contact using BOX modification
03/11/2003US6531374 Overlay shift correction for the deposition of epitaxial silicon layer and post-epitaxial silicon layers in a semiconductor device
03/11/2003US6531372 Method of manufacturing capacitor of semiconductor device using an amorphous TaON
03/11/2003US6531371 Electrically programmable resistance cross point memory
03/11/2003US6531370 Method for manufacturing circuit devices
03/11/2003US6531369 Heterojunction bipolar transistor (HBT) fabrication using a selectively deposited silicon germanium (SiGe)
03/11/2003US6531368 Method of fabricating a semiconductor device having a metal oxide high-k gate insulator by localized laser irradiation and a device thereby formed
03/11/2003US6531367 Method for forming ultra-shallow junction by boron plasma doping
03/11/2003US6531366 Method and structure for high-voltage device with self-aligned graded junctions
03/11/2003US6531365 Anti-spacer structure for self-aligned independent gate implantation
03/11/2003US6531364 Advanced fabrication technique to form ultra thin gate dielectric using a sacrificial polysilicon seed layer
03/11/2003US6531363 Method for manufacturing a semiconductor integrated circuit of triple well structure
03/11/2003US6531362 Method for manufacturing a semiconductor device
03/11/2003US6531361 Fabrication method for a memory device
03/11/2003US6531360 Method of manufacturing a flash memory device