Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2003
05/06/2003US6559524 Dummy leads formed in proximity of edge of opening in solder resist
05/06/2003US6559523 Adjustable pressure die, counter-support, and anisotropic conducting medium
05/06/2003US6559522 Tape carrier package and an LCD module using the same
05/06/2003US6559520 Vaporizing a dialkoxydialkylsilicon for chemical vapor deposition on a semiconductor and introducing oxygen and an inert gas to activate plasma polymerisation; low dielectric constant; humidity and heat resistance
05/06/2003US6559519 Integrated circuit device having cyanate ester buffer coat and method of fabricating same
05/06/2003US6559518 MOS heterostructure, semiconductor device with the structure, and method for fabricating the semiconductor device
05/06/2003US6559516 Antifuse structure and method of making
05/06/2003US6559515 Insulating wall between power components
05/06/2003US6559514 Semiconductor memory device having auxiliary conduction region of reduced area
05/06/2003US6559513 Field-plate MESFET
05/06/2003US6559511 Narrow gap cladding field enhancement for low power programming of a MRAM device
05/06/2003US6559510 Static random access memory device
05/06/2003US6559509 Semiconductor device protection circuit whose operation is stabilized
05/06/2003US6559506 Imaging array and methods for fabricating same
05/06/2003US6559505 Power integrated circuit with vertical current flow and related manufacturing process
05/06/2003US6559504 Lateral double diffused MOS transistor
05/06/2003US6559502 Semiconductor device
05/06/2003US6559501 Method for forming split-gate flash cell for salicide and self-align contact
05/06/2003US6559500 Non-volatile semiconductor memory and its driving method
05/06/2003US6559499 Process for fabricating an integrated circuit device having capacitors with a multilevel metallization
05/06/2003US6559498 Semiconductor device and method of forming the same
05/06/2003US6559497 Microelectronic capacitor with barrier layer
05/06/2003US6559496 Semiconductor device and manufacturing method of the same
05/06/2003US6559495 Semiconductor memory cell device
05/06/2003US6559494 Semiconductor device and a method for fabricating the same
05/06/2003US6559493 High density stacked mim capacitor structure
05/06/2003US6559491 Folded bit line DRAM with ultra thin body transistors
05/06/2003US6559490 Method of processing dielectric layer in ferroelectric RAM and structure of the like
05/06/2003US6559489 High speed; doped regions; etch stopper; dielectric with contact apertures and plugging layer
05/06/2003US6559488 Integrated photodetector
05/06/2003US6559486 Etching mask, process for forming contact holes using same, and semiconductor device made by the process
05/06/2003US6559485 Semiconductor device having a gate insulation film resistant to dielectric breakdown
05/06/2003US6559482 III-N compound semiconductor bipolar transistor structure and method of manufacture
05/06/2003US6559481 Semiconductor device for precise measurement of a forward voltage effect
05/06/2003US6559478 Semiconductor integrated circuit and method of fabricating same
05/06/2003US6559477 Flat panel display device and method for manufacturing the same
05/06/2003US6559475 Cross resistor and polycide patterns; semiconductors
05/06/2003US6559472 Film composition
05/06/2003US6559471 Quantum well infrared photodetector and method for fabricating same
05/06/2003US6559470 Negative differential resistance field effect transistor (NDR-FET) and circuits using the same
05/06/2003US6559469 Ferroelectric and high dielectric constant transistors
05/06/2003US6559467 P-n heterojunction-based structures utilizing HVPE grown III-V compound layers
05/06/2003US6559463 Mask pattern transfer method, mask pattern transfer apparatus using the method, and device manufacturing method
05/06/2003US6559461 Wafer scanning support unit of ion implantation apparatus
05/06/2003US6559457 System and method for facilitating detection of defects on a wafer
05/06/2003US6559454 Ion beam generation apparatus
05/06/2003US6559451 Manufacturing method for two-dimensional image detectors and two-dimensional image detectors
05/06/2003US6559449 Planar X-ray detector
05/06/2003US6559438 Multiple parallel source scanning device
05/06/2003US6559433 Display type image sensor
05/06/2003US6559424 Heat treatment and radiation of semiconductors; passageway with coolant
05/06/2003US6559412 Laser processing
05/06/2003US6559409 Method for marking integrated circuits with a laser
05/06/2003US6559408 Toroidal low-field reactive gas source
05/06/2003US6559390 Solder connect assembly and method of connecting a semiconductor package and a printed wiring board
05/06/2003US6559328 Metallic complex
05/06/2003US6559228 Vinyl 4-t-butoxycarbonyloxybenzal-vinyl 4-hydroxybenzal-vinyl alcohol-vinyl acetate copolymer
05/06/2003US6559076 Removing free halogen, in particular fluorine, from a halogenated polymer layer by reacting with ionized hydrogen to form gaseous hydrogen halide
05/06/2003US6559075 Method of separating two layers of material from one another and electronic components produced using this process
05/06/2003US6559074 Method of forming a silicon nitride layer on a substrate
05/06/2003US6559071 Process for producing dielectric thin films
05/06/2003US6559070 Mesoporous silica films with mobile ion gettering and accelerated processing
05/06/2003US6559069 Process for the electrochemical oxidation of a semiconductor substrate
05/06/2003US6559068 Method for improving inversion layer mobility in a silicon carbide metal-oxide semiconductor field-effect transistor
05/06/2003US6559067 Method for patterning an organic antireflection layer
05/06/2003US6559066 Substrate for use in display element, method of manufacturing the same, and apparatus for manufacturing the same
05/06/2003US6559064 Method and apparatus for removing photoresist on semiconductor wafer
05/06/2003US6559063 Method for manufacturing semiconductor wafer having resist mask with measurement marks for measuring the accuracy of overlay of a photomask
05/06/2003US6559062 Method for avoiding notching in a semiconductor interconnect during a metal etching step
05/06/2003US6559061 Method and apparatus for forming improved metal interconnects
05/06/2003US6559060 Process for the structuring of a substrate
05/06/2003US6559059 Method for fabricating a MOS transistor of an embedded memory
05/06/2003US6559058 Method of fabricating three-dimensional components using endpoint detection
05/06/2003US6559057 Semiconductor processing methods of forming a conductive projection and methods of increasing alignment tolerances
05/06/2003US6559056 Aqueous dispersion for chemical mechanical polishing
05/06/2003US6559055 Dummy structures that protect circuit elements during polishing
05/06/2003US6559054 Methods of treating surfaces of substrates
05/06/2003US6559053 Method of passivating an oxide surface subjected to a conductive material anneal
05/06/2003US6559052 Deposition of amorphous silicon films by high density plasma HDP-CVD at low temperatures
05/06/2003US6559051 Electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors
05/06/2003US6559050 Process for high thermal stable contact formation in manufacturing sub-quarter-micron CMOS devices
05/06/2003US6559049 All dual damascene oxide etch process steps in one confined plasma chamber
05/06/2003US6559048 Method of making a sloped sidewall via for integrated circuit structure to suppress via poisoning
05/06/2003US6559047 Method of forming a metal interconnect that substantially reduces the formation of intermetallic residue regions
05/06/2003US6559046 Insulator for integrated circuits and process
05/06/2003US6559045 Fabrication of integrated circuits with borderless vias
05/06/2003US6559044 Method for forming contacts
05/06/2003US6559043 Method for electrical interconnection employing salicide bridge
05/06/2003US6559042 Process for forming fusible links
05/06/2003US6559041 Semiconductor device and method for manufacturing same
05/06/2003US6559040 Process for polishing the top surface of a polysilicon gate
05/06/2003US6559039 Doped silicon deposition process in resistively heated single wafer chamber
05/06/2003US6559038 Method for growing p-n heterojunction-based structures utilizing HVPE techniques
05/06/2003US6559037 Process for producing semiconductor device having crystallized film formed from deposited amorphous film
05/06/2003US6559036 Semiconductor device and method of manufacturing the same
05/06/2003US6559035 Method for manufacturing an SOI wafer
05/06/2003US6559034 Method of fabricating semiconductor device
05/06/2003US6559033 Processing for forming integrated circuit structure with low dielectric constant material between closely spaced apart metal lines
05/06/2003US6559032 Method of fabricating an isolation structure on a semiconductor substrate
05/06/2003US6559031 Method of fabricating semiconductor device having element isolation trench
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