Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2003
05/13/2003US6563180 Semiconductor integrated circuit device
05/13/2003US6563179 MOS transistor and method for producing the transistor
05/13/2003US6563178 Semiconductor device and method for fabricating the device
05/13/2003US6563177 Semiconductor memory device having a trench and a gate electrode vertically formed on a wall of the trench
05/13/2003US6563176 Integrated circuits; non-self-aligned resistor well compensating implant formed under source; dopes
05/13/2003US6563175 NMOS ESD protection device with thin silicide and methods for making same
05/13/2003US6563174 Thin film transistor and matrix display device
05/13/2003US6563173 Silicon-on-insulator chip having an isolation barrier for reliability
05/13/2003US6563172 Semiconductor substrate processing method
05/13/2003US6563171 High-voltage transistor with buried conduction layer
05/13/2003US6563170 Insulated gate bipolar transistor
05/13/2003US6563169 Semiconductor device with high withstand voltage and a drain layer having a highly conductive region connectable to a diffused source layer by an inverted layer
05/13/2003US6563168 Non-volatile semiconductor device with anti-punch through regions
05/13/2003US6563166 Flash cell device
05/13/2003US6563165 Non-volatile semiconductor memory device and method for producing the same
05/13/2003US6563163 Nonvolatile memory using deep level capture of carrier at corner structure of oxide film
05/13/2003US6563162 Semiconductor memory device for reducing parasitic bit line capacitance and method of fabricating the same
05/13/2003US6563161 Memory-storage node and the method of fabricating the same
05/13/2003US6563160 High dielectric constant materials forming components of DRAM such as deep-trench capacitors and gate dielectric (insulators) for support circuits
05/13/2003US6563159 Substrate of semiconductor integrated circuit
05/13/2003US6563158 Method and apparatus for voltage stiffening in an integrated circuit
05/13/2003US6563157 Semiconductor device having rigid capacitor structure with a liner film
05/13/2003US6563155 Cross point type DRAM cell composed of a pillar having an active region
05/13/2003US6563154 Polysilicon layer having improved roughness after POCl3 doping
05/13/2003US6563152 Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel
05/13/2003US6563151 Field effect transistors having gate and sub-gate electrodes that utilize different work function materials and methods of forming same
05/13/2003US6563148 Semiconductor device with dummy patterns
05/13/2003US6563147 HBT with a SiGe base region having a predetermined Ge content profile
05/13/2003US6563146 Lateral heterojunction bipolar transistor and method of fabricating the same
05/13/2003US6563145 Wide and narrow bandgap collector comprising gallium-arsenic intermetallic and indium-gallium phosphide; semiconductors
05/13/2003US6563144 Process for growing epitaxial gallium nitride and composite wafers
05/13/2003US6563143 CMOS circuit of GaAs/Ge on Si substrate
05/13/2003US6563136 Thin-film semiconductor device having a thin-film transistor for circuits that differs from a thin-film transistor for pixels
05/13/2003US6563135 Thin film transistor and a method of forming the same
05/13/2003US6563133 Method of epitaxial-like wafer bonding at low temperature and bonded structure
05/13/2003US6563131 Method and structure of a dual/wrap-around gate field effect transistor
05/13/2003US6563125 Charged-particle-beam microlithography apparatus and methods for preventing coulomb effects using the hollow-beam technique
05/13/2003US6563123 Method of producing carbon with electrically active sites
05/13/2003US6563118 Pyroelectric device on a monocrystalline semiconductor substrate and process for fabricating same
05/13/2003US6563114 Substrate inspecting system using electron beam and substrate inspecting method using electron beam
05/13/2003US6563110 In-line gas ionizer and method
05/13/2003US6563092 Measurement of substrate temperature in a process chamber using non-contact filtered infrared pyrometry
05/13/2003US6563079 Method for machining work by laser beam
05/13/2003US6563077 System for providing a continuous motion sequential lateral solidification
05/13/2003US6563076 Voltage control sensor and control interface for radio frequency power regulation in a plasma reactor
05/13/2003US6562927 Method of making a thermoformable article having uniform distribution of coloring and mineral filler before and after thermoforming
05/13/2003US6562925 Organic anti-reflective coating polymer, anti-reflective coating composition and methods of preparation thereof
05/13/2003US6562736 Manufacturing method for semiconductor device
05/13/2003US6562735 Control of reaction rate in formation of low k carbon-containing silicon oxide dielectric material using organosilane, unsubstituted silane, and hydrogen peroxide reactants
05/13/2003US6562734 Method of filling gaps on a semiconductor wafer
05/13/2003US6562733 Semiconductor device manufacturing method
05/13/2003US6562732 Method of manufacturing a semiconductor device
05/13/2003US6562731 Method for forming dielectric layers
05/13/2003US6562730 Barrier in gate stack for improved gate dielectric integrity
05/13/2003US6562729 Silicon nitride and silicon dioxide gate insulator transistors and method of forming same in a hybrid integrated circuit
05/13/2003US6562728 Surface treatment method of germanium-containing semiconductor substrate that includes immersion of the substrate in chemical solutions to remove foreign matter
05/13/2003US6562727 Methods and compositions for removal of anti-reflective layers using fluorine containing compounds, oxidants, and water
05/13/2003US6562726 Acid blend for removing etch residue
05/13/2003US6562725 Dual damascene structure employing nitrogenated silicon carbide and non-nitrogenated silicon carbide etch stop layers
05/13/2003US6562724 Self-aligned stack formation
05/13/2003US6562723 Hybrid stack method for patterning source/drain areas
05/13/2003US6562722 Method and apparatus for dry etching
05/13/2003US6562721 Dry etching method and method of manufacturing semiconductor device
05/13/2003US6562720 Apparatus and method for surface finishing a silicon film
05/13/2003US6562719 Solution which contains an oxidizer, phosphoric acid, organic acid, a chemical to form inhibition layer, and water.
05/13/2003US6562718 Process for forming fully silicided gates
05/13/2003US6562717 Semiconductor device having multiple thickness nickel silicide layers
05/13/2003US6562716 Method for fabricating semiconductor device
05/13/2003US6562715 Barrier layer structure for copper metallization and method of forming the structure
05/13/2003US6562714 Consolidation method of junction contact etch for below 150 nanometer deep trench-based DRAM devices
05/13/2003US6562713 Method of protecting semiconductor areas while exposing a gate
05/13/2003US6562712 Multi-step planarizing method for forming a patterned thermally extrudable material layer
05/13/2003US6562711 Method of reducing capacitance of interconnect
05/13/2003US6562710 Semiconductor device and method for fabricating the same
05/13/2003US6562709 Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint
05/13/2003US6562708 Method for incorporating silicon into CVD metal films
05/13/2003US6562707 Method of forming a semiconductor device using selective epitaxial growth
05/13/2003US6562706 Structure and manufacturing method of SiC dual metal trench Schottky diode
05/13/2003US6562705 Method and apparatus for manufacturing semiconductor element
05/13/2003US6562704 Method for manufacturing semiconductor device, and semiconductor device
05/13/2003US6562703 Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content
05/13/2003US6562702 Semiconductor device and method and apparatus for manufacturing semiconductor device
05/13/2003US6562701 Method of manufacturing nitride semiconductor substrate
05/13/2003US6562700 Process for removal of resist mask over low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and removal of residues from via etch and resist mask removal
05/13/2003US6562699 Process for manufacturing semiconductor device
05/13/2003US6562698 Dual laser cutting of wafers
05/13/2003US6562697 Methods of implanting ions into different active areas to provide active areas having increased ion concentrations adjacent to isolation structures
05/13/2003US6562696 Method for forming an STI feature to avoid acidic etching of trench sidewalls
05/13/2003US6562695 Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processing
05/13/2003US6562694 Method of manufacturing a semiconductor device comprising semiconductor elements formed in a toplayer of a silicon wafer situated on a buried insulating layer
05/13/2003US6562693 Semiconductor laser device and wire bonding method capable of easily performing reliable wire bonding
05/13/2003US6562692 Dielectric isolated wafer and its production method
05/13/2003US6562690 Plasma processes for depositing low dielectric constant films
05/13/2003US6562689 Non-ion-implanted resistive silicon oxynitride films as resistors
05/13/2003US6562688 Method of manufacturing a bipolar device
05/13/2003US6562687 MIS transistor and method for making same on a semiconductor substrate
05/13/2003US6562686 Method for fabricating semiconductor device
05/13/2003US6562685 Method of fabricating field effect transistor
05/13/2003US6562684 Methods of forming dielectric materials
05/13/2003US6562683 Bit-line oxidation by removing ONO oxide prior to bit-line implant
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