Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2003
04/29/2003US6555878 Umos-like gate-controlled thyristor structure for ESD protection
04/29/2003US6555876 Thin film transistor array substrate having laser illumination indicator
04/29/2003US6555875 EL display device with a TFT
04/29/2003US6555874 Method of fabricating high performance SiGe heterojunction bipolar transistor BiCMOS on a silicon-on-insulator substrate
04/29/2003US6555873 High-voltage lateral transistor with a multi-layered extended drain structure
04/29/2003US6555872 Trench gate fermi-threshold field effect transistors
04/29/2003US6555871 Flash memory device having a bipolar transistor formed integral thereto and a method of manufacture therefor
04/29/2003US6555870 Nonvolatile semiconductor memory device and method for producing same
04/29/2003US6555869 Non-volatile memory device and method of manufacturing the same
04/29/2003US6555868 Semiconductor device and method of manufacturing the same
04/29/2003US6555867 Systems for improving gate coupling in flash memory elements
04/29/2003US6555866 Non-volatile memory and fabrication thereof
04/29/2003US6555865 Nonvolatile semiconductor memory device with a multi-layer sidewall spacer structure and method for manufacturing the same
04/29/2003US6555864 Ferroelectric capacitor having a PZT layer with an excess of Pb
04/29/2003US6555863 Semiconductor circuit constructions, capacitor constructions, and methods of forming semiconductor circuit constructions and capacitor constructions
04/29/2003US6555862 Self-aligned buried strap for vertical transistors
04/29/2003US6555861 Semiconductor integrated circuit device and process for manufacturing the same
04/29/2003US6555859 Ferroelectric randon access memory; high and low temperature annealing
04/29/2003US6555858 Self-aligned magnetic clad write line and its method of formation
04/29/2003US6555857 Suitable for use to connect electric condenser microphones
04/29/2003US6555853 Semiconductor device having embedded array
04/29/2003US6555852 Bipolar transistor having an emitter comprised of a semi-insulating material
04/29/2003US6555851 High electron mobility transistor
04/29/2003US6555850 Composite channel structure having first channel layer containing gallium indium phosphide semiconductor and second channel layer containing gallium arsenide semiconductor; improves avalanche breakdown voltage of transistor
04/29/2003US6555847 Nitride based semiconductor light emitting element
04/29/2003US6555845 Method for manufacturing group III-V compound semiconductors
04/29/2003US6555844 Semiconductor device with minimal short-channel effects and low bit-line resistance
04/29/2003US6555843 Semiconductor device and method for forming the same
04/29/2003US6555839 Buried channel strained silicon FET using a supply layer created through ion implantation
04/29/2003US6555836 Method and apparatus for inspecting bumps and determining height from a regular reflection region
04/29/2003US6555834 Gas flushing system for use in lithographic apparatus
04/29/2003US6555833 Charged particle beam lithography apparatus for forming pattern on semi-conductor
04/29/2003US6555832 Determining beam alignment in ion implantation using Rutherford Back Scattering
04/29/2003US6555829 High precision flexure stage
04/29/2003US6555825 Ion implanter
04/29/2003US6555790 Semiconductor manufacturing apparatus, method for cleaning the semiconductor manufacturing apparatus, and light source unit
04/29/2003US6555764 Used to electrically test integrated circuit of large-scale integration device with terminals of integrated circuit being connected to contacts of integrated circuit contactor
04/29/2003US6555763 Multilayered circuit board for semiconductor chip module, and method of manufacturing the same
04/29/2003US6555759 Interconnect structure
04/29/2003US6555758 Multiple blank for electronic components such as SAW components, and method of building up bumps, solder frames, spacers and the like
04/29/2003US6555755 Flexible interconnecting substrate and method of manufacturing the same, film carrier, tape-shaped semiconductor device, semiconductor device, circuit board, and electronic equipment
04/29/2003US6555701 CVD material compound and method for manufacturing the same and CVD method of ruthenium or ruthenium compound thin film
04/29/2003US6555607 Resin, a crosslinking agent, and surface active agents; photoresists
04/29/2003US6555510 Bis(perfluoroalkanesulfonyl)imides and their salts as surfactants/additives for applications having extreme environments and methods therefor
04/29/2003US6555487 Method of selective oxidation conditions for dielectric conditioning
04/29/2003US6555485 Method for fabricating a gate dielectric layer
04/29/2003US6555484 Method for controlling the oxidation of implanted silicon
04/29/2003US6555483 Gate insulation film having a slanted nitrogen concentration profile
04/29/2003US6555482 Process for fabricating a MOS transistor having two gates, one of which is buried and corresponding transistor
04/29/2003US6555481 Semiconductor device and its manufacture
04/29/2003US6555479 Method for forming openings for conductive interconnects
04/29/2003US6555478 Stacked local interconnect structure and method of fabricating same
04/29/2003US6555477 Method for preventing Cu CMP corrosion
04/29/2003US6555476 Silicon carbide as a stop layer in chemical mechanical polishing for isolation dielectric
04/29/2003US6555474 Method of forming a protective layer included in metal filled semiconductor features
04/29/2003US6555473 Field effect transistors and methods of forming a field effect transistor
04/29/2003US6555472 Method of producing a semiconductor device using feature trimming
04/29/2003US6555470 Method of manufacturing a semiconductor device with metallization layers interconnected by tungsten plugs
04/29/2003US6555469 Chip scale packages
04/29/2003US6555468 Method for forming trench including a first and a second layer of photoresist
04/29/2003US6555467 Method of making air gaps copper interconnect
04/29/2003US6555466 Two-step chemical-mechanical planarization for damascene structures on semiconductor wafers
04/29/2003US6555465 Multi-layer wiring structure of integrated circuit and manufacture of multi-layer wiring
04/29/2003US6555464 Semiconductor device and method of manufacturing the same
04/29/2003US6555463 Methods of fabricating buried digit lines
04/29/2003US6555462 Semiconductor device having stress reducing laminate and method for manufacturing the same
04/29/2003US6555461 Method of forming low resistance barrier on low k interconnect
04/29/2003US6555460 Methods for mask repattern process
04/29/2003US6555459 Method of manufacturing a semiconductor device
04/29/2003US6555457 Method of forming a laser circuit having low penetration ohmic contact providing impurity gettering and the resultant laser circuit
04/29/2003US6555456 Method of forming iridium conductive electrode/barrier structure
04/29/2003US6555455 Methods of passivating an oxide surface subjected to a conductive material anneal
04/29/2003US6555454 Semiconductor memory device incorporating therein ruthenium electrode and method for the manufacture thereof
04/29/2003US6555453 Fully nickel silicided metal gate with shallow junction formed
04/29/2003US6555452 Method for growing p-type III-V compound material utilizing HVPE techniques
04/29/2003US6555451 Method for making shallow diffusion junctions in semiconductors using elemental doping
04/29/2003US6555450 Contact forming method for semiconductor device
04/29/2003US6555449 Methods for producing uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors using sequential lateral solidfication
04/29/2003US6555448 Semiconductor manufacturing method
04/29/2003US6555447 Method for laser scribing of wafers
04/29/2003US6555446 Body contact silicon-on-insulator transistor and method
04/29/2003US6555445 Manufacturing method of semiconductor device
04/29/2003US6555444 Device and method for core buildup using a separator
04/29/2003US6555443 Method for production of a thin film and a thin-film solar cell, in particular, on a carrier substrate
04/29/2003US6555442 Method of forming shallow trench isolation with rounded corner and divot-free by using disposable spacer
04/29/2003US6555440 Process for fabricating a top side pitted diode device
04/29/2003US6555439 Partial recrystallization of source/drain region before laser thermal annealing
04/29/2003US6555438 Method for fabricating MOSFETs with a recessed self-aligned silicide contact and extended source/drain junctions
04/29/2003US6555437 Multiple halo implant in a MOSFET with raised source/drain structure
04/29/2003US6555436 Simultaneous formation of charge storage and bitline to wordline isolation
04/29/2003US6555435 Method to eliminate shorts between adjacent contacts due to interlevel dielectric voids
04/29/2003US6555434 Nonvolatile memory device and manufacturing method thereof
04/29/2003US6555433 Method of manufacture of a crown or stack capacitor with a monolithic fin structure made with a different oxide etching rate in hydrogen fluoride vapor
04/29/2003US6555432 Integrated capacitor bottom electrode for use with conformal dielectric
04/29/2003US6555431 Method for forming integrated circuit capacitor and memory
04/29/2003US6555430 Process flow for capacitance enhancement in a DRAM trench
04/29/2003US6555429 Method of manufacturing semiconductor devices utilizing underlayer-dependency of deposition of capacitor electrode film, and semiconductor device
04/29/2003US6555428 Ferroelectric capacitor and method for fabricating the same
04/29/2003US6555427 Non-volatile semiconductor memory device and manufacturing method thereof
04/29/2003US6555426 Semiconductor processing methods of forming devices on a substrate, forming device arrays on a substrate, forming conductive lines on a substrate, and forming capacitor arrays on a substrate, and integrated circuitry
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