Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2003
05/01/2003US20030082914 Semiconductor wafer processing apparatus
05/01/2003US20030082913 Etchant formulation for selectively removing thin films in the presence of copper, tin, and lead
05/01/2003US20030082912 Detergent composition
05/01/2003US20030082911 Apparatus for and method of etching
05/01/2003US20030082910 Contact improvement by employing a conductive sacrificial layer
05/01/2003US20030082909 High-k gate oxides with buffer layers of titanium for MFOS single transistor memory applications
05/01/2003US20030082907 Low resistance semiconductor process and structures
05/01/2003US20030082906 Plating pillars (photoresists) on bottom metal layer, coating over with polymer, curing, then blanket etching
05/01/2003US20030082905 Method for forming a uniform damascene profile
05/01/2003US20030082904 Chemical mechanical polishing of copper-oxide damascene structures
05/01/2003US20030082903 Planarization of metal container structures
05/01/2003US20030082902 Semiconductor-device fabrication method
05/01/2003US20030082901 Void formation monitoring in a damascene process
05/01/2003US20030082900 Method of forming contact plugs
05/01/2003US20030082899 Method of forming interconnects
05/01/2003US20030082898 Ball grid array X-ray orientation mark
05/01/2003US20030082897 Method for forming bumps, semiconductor device, and solder paste
05/01/2003US20030082896 Hole metal-filling method
05/01/2003US20030082895 Method for reducing gate length bias
05/01/2003US20030082894 System and method for addressing junction capacitances in semiconductor devices
05/01/2003US20030082893 Method of fabricating nitride semiconductor and method of fabricating semiconductor device
05/01/2003US20030082892 Method for reducing the drain coupling ratio of floating gate device
05/01/2003US20030082891 Methods and apparatus for plasma doping and ion implantation in an integrated processing system
05/01/2003US20030082890 Fan out of interconnect elements attached to semiconductor wafer
05/01/2003US20030082889 Semiconductor device and method of manufacturing the same
05/01/2003US20030082888 Method of incorporating deep trench into shallow trench isolation process without added masks
05/01/2003US20030082887 Creation of a polarizable layer in the buried oxide of silicon-on-insulator substrates for the fabrication of non-volatile memory
05/01/2003US20030082886 Method of preparing silicon-on-insulator substrates particularly suited for microwave applications
05/01/2003US20030082885 Process for manufacturing semiconductors with a trench capacitor
05/01/2003US20030082884 Method of forming low-leakage dielectric layer
05/01/2003US20030082883 Fabrication method and apparatus for fabricating a spatial structure in a semiconductor substrate
05/01/2003US20030082882 Control of dopant diffusion from buried layers in bipolar integrated circuits
05/01/2003US20030082881 Method for manufacturing a self-aligned MOS transistor
05/01/2003US20030082880 Low-temperature post-dopant activation process
05/01/2003US20030082879 Non-volatile semiconductor memory device and method of manufacturing the same
05/01/2003US20030082878 Method for manufacturing semiconductor device
05/01/2003US20030082877 Semiconductor integrated circuit device and a method of manufacturing the same
05/01/2003US20030082876 Vertical DRAM punchthrough stop self-aligned to storage trench
05/01/2003US20030082875 Method of forming a deep trench dram cell
05/01/2003US20030082874 Semiconductor processing methods
05/01/2003US20030082873 Contact structure for semiconductor devices and corresponding manufacturing process
05/01/2003US20030082872 Fabricating a substantially self-aligned MOSFET
05/01/2003US20030082871 Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
05/01/2003US20030082869 Semiconductor memory device for reducing damage to interlevel dielectric layer and fabrication method thereof
05/01/2003US20030082868 Integrated circuitry
05/01/2003US20030082866 Method of manufacturing semiconductor device
05/01/2003US20030082865 Fabrication method of semiconductor integrated circuit device
05/01/2003US20030082863 CMOS of semiconductor device and method for manufacturing the same
05/01/2003US20030082862 Method for fabricating a gate layer stack for an integrated circuit configuration
05/01/2003US20030082861 Method for fabricating a MOSFET
05/01/2003US20030082860 Field effect transistor and manufacturing method therefor
05/01/2003US20030082859 Method of manufacturing a semiconductor device
05/01/2003US20030082858 Method for forming thin film and method for forming electronic device
05/01/2003US20030082857 Method of processing a semiconductor wafer and preprocessed semiconductor wafer
05/01/2003US20030082855 for members meeting a proper combination condition by marking inherent information on surface of a member constituting the assembly in advance and by utilizing the information; present invention can be applied to an exhaust catalyst carrier
05/01/2003US20030082854 Lead frame, method of manufacturing the same, and method of manufacturing a semiconductor device using the same
05/01/2003US20030082853 Electrical coupling of a stiffener to a chip carrier
05/01/2003US20030082852 Flip chip package and method for forming the same
05/01/2003US20030082851 Back-side through-hole interconnection of a die to a substrate
05/01/2003US20030082848 Semiconductor device and manufacturing method
05/01/2003US20030082847 Method and apparatus for wafer thinning
05/01/2003US20030082846 Manufacturing method of a semiconductor device incorporating a passive element and a redistribution board
05/01/2003US20030082844 System and method of determining a polishing endpoint by monitoring signal intensity
05/01/2003US20030082840 Method and system for determining a thickness of a layer
05/01/2003US20030082839 Method for calculating threshold voltage of pocket implant mosfet
05/01/2003US20030082838 Method and system for monitoring a semiconductor wafer plasma etch process
05/01/2003US20030082837 Method and apparatus for cascade control using integrated metrology
05/01/2003US20030082835 Method and apparatus to monitor electrical states at a workpiece in a semiconductor processing chamber
05/01/2003US20030082834 Non-contacting deposition control of chalcopyrite thin films
05/01/2003US20030082833 Method for fabricating semiconductor structures utilizing the formation of a compliant substrate
05/01/2003US20030082831 Apparatus for use in the synthesis of preferential biopolymers
05/01/2003US20030082587 Microarrays for use in the detection and analysis of biopolymers
05/01/2003US20030082486 Amplified photoresist; radiation with ultraviolet radiation
05/01/2003US20030082484 Method of manufacturing magnetoresistive device, method of manufacturing thin film magnetic head, and method of forming thin film pattern
05/01/2003US20030082481 Blocking acid generation during photolithography
05/01/2003US20030082466 Wafer handling system and method for use in lithography patterning
05/01/2003US20030082463 Generating photolithography masks; calibration patterns
05/01/2003US20030082462 Forming halftone; overcoating quartz substrate; phase shifting; inserting impurities
05/01/2003US20030082393 Graphite impregnated with molten metal
05/01/2003US20030082356 Metal filling method and member with filled metal sections
05/01/2003US20030082307 Integration of ALD tantalum nitride and alpha-phase tantalum for copper metallization application
05/01/2003US20030082301 Enhanced copper growth with ultrathin barrier layer for high performance interconnects
05/01/2003US20030082300 Vapor deposition using silane compound; uniform thickness
05/01/2003US20030082296 Vapor deposition using metal halide; removal by-products; using scavenger
05/01/2003US20030082042 End-effectors for handling microelectronic workpieces
05/01/2003US20030082032 Wafer management system and methods for managing wafers
05/01/2003US20030082031 Wafer handling device and method for testing wafers
05/01/2003US20030082030 System and method for reticle protection and transport
05/01/2003US20030081945 Heat treating apparatus and method
05/01/2003US20030081643 Oscillation method and device of fluorine molecular laser
05/01/2003US20030081482 Semiconductor storage
05/01/2003US20030081477 Test array and method for testing memory arrays
05/01/2003US20030081467 Magnetic memory using perpendicular magnetization film
05/01/2003US20030081462 Magneto-resistive bit structure and method of manufacture therefor
05/01/2003US20030081458 Method and device for reading dual bit memory cells using multiple reference cells with two side read
05/01/2003US20030081457 Floating gate memory cell, method for fabricating it, and semiconductor memory device
05/01/2003US20030081456 Charge trapping memory cell, method for fabricating it, and semiconductor memory device
05/01/2003US20030081454 Memory cell, memory circuit block, data writing method and data reading method
05/01/2003US20030081452 Isolation of memory cells in cross point arrays
05/01/2003US20030081450 Thin film magnetic memory device for conducting data write operation by application of a magnetic field
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