Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2003
07/22/2003US6597041 Semiconductor static random access memory device
07/22/2003US6597040 Semiconductor device having MOS transistor for coupling two signal lines
07/22/2003US6597039 Composite member, its separation method, and preparation method of semiconductor substrate by utilization thereof
07/22/2003US6597038 MOS transistor with double drain structure for suppressing short channel effect
07/22/2003US6597036 Multi-value single electron memory using double-quantum dot and driving method thereof
07/22/2003US6597034 Non-volatile memory and semiconductor device
07/22/2003US6597033 Semiconductor memory device and manufacturing method thereof
07/22/2003US6597032 Metal-insulator-metal (MIM) capacitors
07/22/2003US6597029 Nonvolatile semiconductor memory device
07/22/2003US6597028 Capacitively coupled ferroelectric random access memory cell and a method for manufacturing the same
07/22/2003US6597027 Dielectric element and method for fabricating the same
07/22/2003US6597026 Semiconductor device comprising plural isolated channels in a shallow trench isolation region
07/22/2003US6597024 Charge-coupled image sensor comprising gate electrodes interconnected by shunt electrodes
07/22/2003US6597023 Semiconductor light-detecting element
07/22/2003US6597022 Method for controlling critical dimension in an HBT emitter and related structure
07/22/2003US6597021 Protection circuit and semiconductor device
07/22/2003US6597020 Process for packaging a chip with sensors and semiconductor package containing such a chip
07/22/2003US6597019 Semiconductor light-emitting device comprising an electrostatic protection element
07/22/2003US6597016 Semiconductor device and method for fabricating the same
07/22/2003US6597015 Multilayer; overcoating dielectric substrate; intake and drain zones
07/22/2003US6597014 Semiconductor device and semiconductor display device
07/22/2003US6597009 Reduced contact area of sidewall conductor
07/22/2003US6597006 Dual beam symmetric height systems and methods
07/22/2003US6597003 Tunable radiation source providing a VUV wavelength planar illumination pattern for processing semiconductor wafers
07/22/2003US6597001 Method of electron-beam exposure and mask and electron-beam exposure system used therein
07/22/2003US6596999 High performance source for electron beam projection lithography
07/22/2003US6596973 Heater power adjustment; nonlinear neural network; semiconductors
07/22/2003US6596968 Method of producing through-hole in aromatic polyimide film
07/22/2003US6596965 Method and apparatus for marking an identification mark on a wafer
07/22/2003US6596964 Method of attaching a component to a connection support by welding without the addition of material
07/22/2003US6596888 MOCVD of WNx thin films using imido precursors
07/22/2003US6596834 Silicone resins having the general formula (R1SiO3/2)x(HSiO3/2)y where R1 is an alkyl group having 8 to 24 carbon atoms; x has a value of 0.05 to 0.7; y has a value of 0.3 to 0.95 and x+y =1. The resins are used to form porous
07/22/2003US6596656 Manufacturing use of photomasks with an opaque pattern comprising an organic layer photoabsorptive to exposure light with wavelengths exceeding 200 NM
07/22/2003US6596655 Silicon oxide layer produced by plasma assisted chemical vapor deposition of an organosilane, using RF or microwave power to generate reactive oxygen atoms
07/22/2003US6596654 Gap fill for high aspect ratio structures
07/22/2003US6596653 Hydrogen assisted undoped silicon oxide deposition process for HDP-CVD
07/22/2003US6596652 Method of fabricating low dielectric constant film
07/22/2003US6596651 Method for stabilizing high pressure oxidation of a semiconductor device
07/22/2003US6596650 Method for fabricating semiconductor integrated circuit device
07/22/2003US6596649 Method and apparatus for supplying gas used in semiconductor processing
07/22/2003US6596648 Material removal method for forming a structure
07/22/2003US6596647 Dilute cleaning composition and method for using the same
07/22/2003US6596646 Method for making a sub 100 nanometer semiconductor device using conventional lithography steps
07/22/2003US6596645 Method for manufacturing a semiconductor memory device
07/22/2003US6596643 CVD TiSiN barrier for copper integration
07/22/2003US6596642 Material removal method for forming a structure
07/22/2003US6596641 Chemical vapor deposition methods
07/22/2003US6596640 Method of forming a raised contact for a substrate
07/22/2003US6596639 Method for chemical/mechanical planarization of a semiconductor wafer having dissimilar metal pattern densities
07/22/2003US6596638 Polishing method
07/22/2003US6596637 Chemically preventing Cu dendrite formation and growth by immersion
07/22/2003US6596636 ALD method to improve surface coverage
07/22/2003US6596635 Method for metallization of a semiconductor substrate
07/22/2003US6596634 Wiring board and fabricating method thereof, semiconductor device and fabricating method thereof, circuit board and electronic instrument
07/22/2003US6596633 Method for manufacturing a semiconductor device
07/22/2003US6596632 Method for forming an integrated circuit interconnect using a dual poly process
07/22/2003US6596631 Method of forming copper interconnect capping layers with improved interface and adhesion
07/22/2003US6596630 Method of cleaning a silicon substrate after blanket depositing a tungsten film by dipping in a solution of hydrofluoric acid, hydrochloric acid, and/or ammonium hydroxide
07/22/2003US6596629 Method for forming wire in semiconductor device
07/22/2003US6596628 Electrode pad in semiconductor device and method of producing the same
07/22/2003US6596627 Very low dielectric constant plasma-enhanced CVD films
07/22/2003US6596625 Method and device for producing a metal/metal contact in a multilayer metallization of an integrated circuit
07/22/2003US6596624 Process for making low dielectric constant hollow chip structures by removing sacrificial dielectric material after the chip is joined to a chip carrier
07/22/2003US6596623 Use of organic spin on materials as a stop-layer for local interconnect, contact and via layers
07/22/2003US6596622 Semiconductor device having a multi-layer pad and manufacturing method thereof
07/22/2003US6596621 Method of forming a lead-free tin-silver-copper based solder alloy on an electronic substrate
07/22/2003US6596620 BGA substrate via structure
07/22/2003US6596619 Method for fabricating an under bump metallization structure
07/22/2003US6596618 Increased solder-bump height for improved flip-chip bonding and reliability
07/22/2003US6596616 Method for forming serrated contact opening in the semiconductor device
07/22/2003US6596615 Semiconductor device and method of manufacturing the same
07/22/2003US6596614 Use of membrane properties to reduce residual stress in an interlayer region
07/22/2003US6596613 Laser annealing method
07/22/2003US6596612 Method for manufacturing semiconductor circuit
07/22/2003US6596611 Method for forming wafer level package having serpentine-shaped electrode along scribe line and package formed
07/22/2003US6596610 Method for reclaiming delaminated wafer and reclaimed delaminated wafer
07/22/2003US6596609 Method of fabricating a feature in an integrated circuit using two edge definition layers and a spacer
07/22/2003US6596608 Method of manufacturing non-volatile semiconductor memory device
07/22/2003US6596607 Method of forming a trench type isolation layer
07/22/2003US6596606 Semiconductor raised source-drain structure
07/22/2003US6596605 Method of forming germanium doped polycrystalline silicon gate of MOS transistor and method of forming CMOS transistor device using the same
07/22/2003US6596604 Method of preventing shift of alignment marks during rapid thermal processing
07/22/2003US6596603 Semiconductor device and manufacturing method thereof, and registration accuracy measurement enhancement method
07/22/2003US6596602 Method of fabricating a high dielectric constant metal oxide capacity insulator film using atomic layer CVD
07/22/2003US6596600 Integrated injection logic semiconductor device and method of fabricating the same
07/22/2003US6596599 Gate stack for high performance sub-micron CMOS devices
07/22/2003US6596598 T-shaped gate device and method for making
07/22/2003US6596597 Method of manufacturing dual gate logic devices
07/22/2003US6596596 Methods of forming a field effect transistors
07/22/2003US6596595 Forming a conductive structure in a semiconductor device
07/22/2003US6596594 Method for fabricating field effect transistor (FET) device with asymmetric channel region and asymmetric source and drain regions
07/22/2003US6596593 Method of manufacturing semiconductor device employing oxygen implantation
07/22/2003US6596592 Structures and methods of anti-fuse formation in SOI
07/22/2003US6596591 Methods to form reduced dimension bit-line isolation in the manufacture of non-volatile memory devices
07/22/2003US6596590 Method of making multi-level type non-volatile semiconductor memory device
07/22/2003US6596589 Method of manufacturing a high coupling ratio stacked gate flash memory with an HSG-SI layer
07/22/2003US6596588 Method of fabricating a flash memory cell
07/22/2003US6596587 Shallow junction EEPROM device and process for fabricating the device
07/22/2003US6596586 Method of forming low resistance common source line for flash memory devices
07/22/2003US6596585 Method of manufacturing semiconductor device
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