Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2003
07/24/2003WO2003060995A2 Bonding device and method for production thereof
07/24/2003WO2003060994A1 Memory chip with low-temperature layers in the trench capacitor
07/24/2003WO2003060993A1 Feedthrough contacts and method for producing the same
07/24/2003WO2003060992A1 Semiconductor device and its production method
07/24/2003WO2003060991A2 Method of filling an isolation trench including two silicon nitride etching steps
07/24/2003WO2003060990A1 Advanced process control (apc) of copper thickness for chemical mechanical planarization(cmp) optimization
07/24/2003WO2003060989A1 Device and system for recording the motion of a wafer and a method therefore
07/24/2003WO2003060988A1 Adhesive sheet stamping device, adhesive sheet stamping method, part mounter, and display panel manufacturing method
07/24/2003WO2003060987A1 Method of arranging micro spheres with liquid, micro sphere arranging device, and semiconductor device
07/24/2003WO2003060986A2 Method of forming a removable support with a sacrificial layers and of transferring devices
07/24/2003WO2003060985A1 Semiconductor package device and method
07/24/2003WO2003060983A1 Bilayer hdp cvd / pe cvd cap in advanced beol interconnect structures and method thereof
07/24/2003WO2003060982A2 Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same
07/24/2003WO2003060981A1 Method for gettering transition metal impurities in silicon crystal
07/24/2003WO2003060980A2 Methods for planarization of group viii metal-containing surfaces using oxidizing gases
07/24/2003WO2003060979A2 Organic compositions for low dielectric constant materials
07/24/2003WO2003060977A2 Method for preventing undesirable etching of contact hole sidewalls in a preclean etching step
07/24/2003WO2003060976A1 Contamination suppression in chemical fluid deposition
07/24/2003WO2003060975A1 Method and device for anisotropic etching of high aspect ratio
07/24/2003WO2003060974A1 Semiconductor wafer protective member and semiconductor wafer grinding method
07/24/2003WO2003060973A1 Processing device
07/24/2003WO2003060972A1 Ic chip manufacturing method
07/24/2003WO2003060971A1 Cutting device
07/24/2003WO2003060970A1 Semiconductor integrated circuit device manufacturing method
07/24/2003WO2003060969A1 Processing device and processing method
07/24/2003WO2003060968A1 Boat for heat treatment and vertical heat treatment equipment
07/24/2003WO2003060967A1 Susceptor for epitaxial growth and epitaxial growth method
07/24/2003WO2003060966A1 Method for masking a recess in a structure with a large aspect ratio
07/24/2003WO2003060965A1 Semiconductor wafer and method for producing the same
07/24/2003WO2003060964A1 Apparatus and method for improving throughput in a cluster tool for semiconductor wafer processing
07/24/2003WO2003060963A2 Electrochemical edge and bevel cleaning process and system
07/24/2003WO2003060962A2 Electrolyte composition and treatment for electrolytic chemical mechanical polishing
07/24/2003WO2003060961A1 High-performance non-contact support platforms
07/24/2003WO2003060960A2 High density area array solder microjoining interconnect structure and fabrication method
07/24/2003WO2003060959A2 Method for applying metal features onto barrier layers using electrochemical deposition
07/24/2003WO2003060958A2 Air bearing-sealed micro-processing chamber
07/24/2003WO2003060955A2 Barrier stack with improved barrier properties
07/24/2003WO2003060919A2 Resistive memory elements with reduced roughness
07/24/2003WO2003060917A2 Reprogrammable non-volatile memory using a breakdown phenomena in an ultra-thin dielectric
07/24/2003WO2003060864A1 Plasma display panel having trench discharge cell and method of fabricating the same
07/24/2003WO2003060779A1 Agent-based control architecture
07/24/2003WO2003060602A1 Thin film transistor and liquid crystal display
07/24/2003WO2003060601A1 A wire for a display device, a method for manufacturing the same, a thin film transistor array panel including the wire, and a method for manufacturing the same
07/24/2003WO2003060447A1 Temperature measurement and heat-treating methods and systems
07/24/2003WO2003060409A1 Continuous process furnace
07/24/2003WO2003060264A1 Wafer carrier door and latching mechanism
07/24/2003WO2003060208A1 Directional assembly of carbon nanotube strings
07/24/2003WO2003060189A1 Emissivity-change-free pumping plate kit in a single wafer chamber
07/24/2003WO2003060182A1 Method of treating a part in order to alter at least one of the properties thereof
07/24/2003WO2003060056A2 Assembly for cell-based assays
07/24/2003WO2003060045A1 Aqueous stripping and cleaning composition
07/24/2003WO2003060030A1 Adhesive curing device and adhesive curing method
07/24/2003WO2003060028A1 Methods for planarization of metal-containing surfaces using halogens and halide salts
07/24/2003WO2003059990A1 Thin films and methods for the preparation thereof
07/24/2003WO2003059984A1 Organic compositions
07/24/2003WO2003059983A1 Diode-laser curing of liquid epoxide encapsulants
07/24/2003WO2003059782A1 Wafer carrier door and latching mechanism with hourglass shaped key slot
07/24/2003WO2003059771A1 Door and two-position spring biased latching mechanism
07/24/2003WO2003059591A1 Device for cutting a substrate layer, and corresponding method
07/24/2003WO2003059590A1 Device for cutting a substrate layer, and corresponding method
07/24/2003WO2003059571A1 Methods for planarization of group viii metal-containing surfaces using a fixed abrasive article
07/24/2003WO2003059486A1 Liquid medicine supplying device and method for venting air from liquid medicine supplying device
07/24/2003WO2003022733A3 Nanotube films and articles
07/24/2003WO2003021661A3 Process for making a mim capacitor
07/24/2003WO2003021645A3 Wafer engine
07/24/2003WO2003017353A3 Providing photonic control over wafer borne semiconductor devices
07/24/2003WO2003017330A3 Forming a semiconductor structure using a combination of planarizing methods and electropolishing
07/24/2003WO2003010834A3 Microelectronic piezoelectric structure
07/24/2003WO2003009364A3 Low dielectric constant layers
07/24/2003WO2003007364A3 Method for producing a packing for semiconductor chips
07/24/2003WO2003007350A3 Wafer jar loader method, system and apparatus
07/24/2003WO2002103762A3 Pod door opener
07/24/2003WO2002099848A3 Formation of printed circuit board structures using piezo microdeposition
07/24/2003WO2002097861A3 Semiconductor device, semiconductor layer and production method thereof
07/24/2003WO2002093623A3 Assembly comprising heat distributing plate and edge support
07/24/2003WO2002089187A3 An improved method for forming minimally spaced mram structures
07/24/2003WO2002075810A3 Integrated circuit comprising electric connecting elements
07/24/2003WO2002065530B1 Use of hydrocarbon addition for the elimination of micromasking during etching of organic low-k dielectrics
07/24/2003WO2002061167A3 Target/backing plate assemblies
07/24/2003WO2002037566A3 Silicon controlled rectifier electrostatic discharge protection device with external on-chip triggering and compact internal dimensions for fast triggering
07/24/2003WO2002023612A3 Process for removing an oxide during the fabrication of a resistor
07/24/2003WO2002015209A3 Methods and apparatus for making integrated circuit package including opening exposing portion of the ic
07/24/2003US20030140330 Method for correcting a mask pattern, a computer program product, a method for producing a photomask, and method for manufacturing a semiconductor device
07/24/2003US20030140329 Method for forming exposure pattern and exposure pattern
07/24/2003US20030140323 Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device manufactured using the same
07/24/2003US20030140318 Computer aided design system and computer-readable medium storing a program for designing clock gated logic circuits and gated clock circuit
07/24/2003US20030140317 Forming recesses in layers, forming via holes, positioning electronic components in the recesses, mettalizing the holes and connecting the hole to the elxtronic components
07/24/2003US20030140289 Dual port RAM
07/24/2003US20030140287 N-squared algorithm for optimizing correlated events
07/24/2003US20030140255 Management system, method and apparatus for licensed delivery and accounting of electronic circuits
07/24/2003US20030139852 Method of determining retreat permission position of carrier arm and teaching device thereof
07/24/2003US20030139847 Visually enhanced intelligent article tracking system
07/24/2003US20030139838 Systems and methods for closed loop defect reduction
07/24/2003US20030139835 System for determining dry cleaning timing, method for determining dry cleaning timing, dry cleaning method, and method for manufacturing semiconductor device
07/24/2003US20030139833 Methods and apparatus for determining optimum exposure threshold for a given photolithographic model
07/24/2003US20030139127 Capsulated abrasive composition and polishing pad using the same
07/24/2003US20030139124 Grooved rollers for a linear chemical mechanical planarization system
07/24/2003US20030139123 Carrier head with a substrate detection mechanism for a chemical mechanical polishing system
07/24/2003US20030139116 CMP systems and methods utilizing amine-containing polymers
07/24/2003US20030139115 Method and apparatus for applying downward force on wafer during CMP