Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2003
07/15/2003US6593637 Method for establishing component isolation regions in SOI semiconductor device
07/15/2003US6593634 Semiconductor device and method of manufacturing the same
07/15/2003US6593633 Method and device for improved salicide resistance on polysilicon gates
07/15/2003US6593632 Interconnect methodology employing a low dielectric constant etch stop layer
07/15/2003US6593631 Method of fabricating semiconductor device
07/15/2003US6593629 Semiconductor device
07/15/2003US6593628 Semiconductor device and method of manufacturing same
07/15/2003US6593627 SOI semiconductor wafer having different thickness active layers and semiconductor device formed therein
07/15/2003US6593626 Electro-optical device, method for making the same, and electronic apparatus
07/15/2003US6593625 Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing
07/15/2003US6593623 Reduced channel length lightly doped drain transistor using a sub-amorphous large tilt angle implant to provide enhanced lateral diffusion
07/15/2003US6593620 Trench DMOS transistor with embedded trench schottky rectifier
07/15/2003US6593619 High voltage power MOSFET having low on-resistance
07/15/2003US6593618 MIS semiconductor device having an elevated source/drain structure
07/15/2003US6593617 Field effect transistors with vertical gate side walls and method for making such transistors
07/15/2003US6593616 Buried bit line memory circuitry
07/15/2003US6593615 Dielectric gap fill process that effectively reduces capacitance between narrow metal lines using HDP-CVD
07/15/2003US6593614 Integrated circuit configuration having at least one transistor and one capacitor, and method for fabricating it
07/15/2003US6593612 Structure and method for forming a body contact for vertical transistor cells
07/15/2003US6593611 Electrical and electronic apparatus comprising substrates having diffusion layers connected to cell plate electrode films formed on cylindrical storage electrodes; high aspect ratio
07/15/2003US6593610 Memory cell arrays
07/15/2003US6593609 Semiconductor memory device
07/15/2003US6593608 Magneto resistive storage device having double tunnel junction
07/15/2003US6593606 Staggered bitline strapping of a non-volatile memory cell
07/15/2003US6593604 Electrical and electronic apparatus comprising multilayer emitters and electrodes, used for power amplification
07/15/2003US6593601 Integrated circuit device that can suppress undesired inter-device effects
07/15/2003US6593594 Silicon carbide n-channel power LMOSFET
07/15/2003US6593593 Transparent electrode comprising ZnO and a film with a melting point lower than that of ZnO
07/15/2003US6593592 Semiconductor device having thin film transistors
07/15/2003US6593591 Thin film device provided with coating film, liquid crystal panel and electronic device, and method the thin film device
07/15/2003US6593585 Optical apparatus comprising lenses, masking and substrate holders, light sources and mirrors for shaping and focusing radiation beams
07/15/2003US6593584 Multi-beam lithography apparatus with mutually different beam limiting apertures
07/15/2003US6593583 Ion beam processing position correction method
07/15/2003US6593581 Object carrier for a particle-optical apparatus
07/15/2003US6593545 Laser defined pads for flip chip on leadframe package fabrication method
07/15/2003US6593484 Forming tantalum nitride film as barrier film by chemical vapor deposition
07/15/2003US6593450 2,7-aryl-9-substituted fluorenes and 9-substituted fluorene oligomers and polymers
07/15/2003US6593446 Copolymer comprising styrene and 3,3-alkoxypropene derivative monomers; light absorber; semiconductors
07/15/2003US6593441 Photosensitive polymer and chemically amplified photoresist composition containing the same
07/15/2003US6593282 Cleaning solutions for semiconductor substrates after polishing of copper film
07/15/2003US6593254 Method for clamping a semiconductor device in a manufacturing process
07/15/2003US6593253 Method of manufacturing semiconductor device
07/15/2003US6593252 Film deposition method and apparatus
07/15/2003US6593251 Method to produce a porous oxygen-silicon layer
07/15/2003US6593250 Fabrication method of semiconductor device using low-k film
07/15/2003US6593248 Method for producing hydrogenated silicon oxycarbide films having low dielectric constant
07/15/2003US6593247 Method of depositing low k films using an oxidizing plasma
07/15/2003US6593246 Process for producing semiconductor device
07/15/2003US6593245 Silicon nitride etch process with critical dimension gain
07/15/2003US6593244 Process for etching conductors at high etch rates
07/15/2003US6593243 Method of manufacturing semiconductor device
07/15/2003US6593242 Process for planarization and recess etching of integrated circuits
07/15/2003US6593241 Method of planarizing a semiconductor device using a high density plasma system
07/15/2003US6593240 Two step chemical mechanical polishing process
07/15/2003US6593239 Chemical mechanical polishing method useful for copper substrates
07/15/2003US6593238 Method for determining an endpoint and semiconductor wafer
07/15/2003US6593237 Method for manufacturing a low dielectric constant stop layer for integrated circuit interconnects
07/15/2003US6593236 Method of forming a metal wiring in a semiconductor device with copper seed
07/15/2003US6593235 Semiconductor device with a tapered hole formed using multiple layers with different etching rates
07/15/2003US6593234 Methods of utilizing metal rich silicide in forming semiconductor constructions
07/15/2003US6593233 Semiconductor device and method for manufacturing the same
07/15/2003US6593232 Plasma etch method with enhanced endpoint detection
07/15/2003US6593231 Process of manufacturing electron microscopic sample and process of analyzing semiconductor device
07/15/2003US6593230 Method of manufacturing semiconductor device
07/15/2003US6593229 Semiconductor integrated circuit device and method for manufacturing the same
07/15/2003US6593228 Method of fabricating a patterned metal-containing layer on a semiconductor wafer
07/15/2003US6593227 Method and apparatus for planarizing surfaces of semiconductor device conductive layers
07/15/2003US6593226 Method for adding features to a design layout and process for designing a mask
07/15/2003US6593225 Method of forming a stacked dielectric layer on a semiconductor substrate having metal patterns
07/15/2003US6593223 Method of forming dual damascene structure
07/15/2003US6593222 Method to improve the reliability of thermosonic gold to aluminum wire bonds
07/15/2003US6593221 Selective passivation of exposed silicon
07/15/2003US6593220 Elastomer plating mask sealed wafer level package method
07/15/2003US6593219 Method for fabricating electrode structure and method for fabricating semiconductor device
07/15/2003US6593217 Method of manufacturing semiconductor device
07/15/2003US6593216 Method for producing semiconductor device
07/15/2003US6593215 Method of manufacturing crystalline semiconductor material and method of manufacturing semiconductor device
07/15/2003US6593214 Method of manufacturing semiconductor device
07/15/2003US6593213 Synthesis of layers, coatings or films using electrostatic fields
07/15/2003US6593212 Method for making electro-optical devices using a hydrogenion splitting technique
07/15/2003US6593211 Semiconductor substrate and method for producing the same
07/15/2003US6593210 Self-aligned/maskless reverse etch process using an inorganic film
07/15/2003US6593208 Method of uniform polish in shallow trench isolation process
07/15/2003US6593207 Method of forming a trench device isolation structure with upper liner pattern
07/15/2003US6593206 Isolation region forming methods
07/15/2003US6593205 Patterned SOI by formation and annihilation of buried oxide regions during processing
07/15/2003US6593204 Method of fabricating a silicon-on-insulator system with thin semiconductor islets surrounded by an insulative material
07/15/2003US6593203 Semiconductor processing methods of forming a plurality of capacitors on a substrate, bit line contacts and method of forming bit line contacts
07/15/2003US6593202 Semiconductor memory device and fabrication method thereof
07/15/2003US6593201 Monolithic inductance-enhancing integrated circuits, complementary metal oxide semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies, and inductance-multiplying methods
07/15/2003US6593200 Method of forming an integrated inductor and high speed interconnect in a planarized process with shallow trench isolation
07/15/2003US6593199 Method of manufacturing a semiconductor component and semiconductor component thereof
07/15/2003US6593198 Semiconductor device and method for fabricating the same
07/15/2003US6593197 Sidewall spacer based fet alignment technology
07/15/2003US6593196 Methods of forming a transistor gate
07/15/2003US6593195 Stable memory device that utilizes ion positioning to control state of the memory device
07/15/2003US6593194 Metal-insulator-semiconductor field effect transistor having an oxidized aluminum nitride gate insulator formed on a gallium nitride or silicon substrate, and method of making the same
07/15/2003US6593193 Semiconductor device and method for fabricating the same
07/15/2003US6593192 Method of forming a dual-gated semiconductor-on-insulator device
07/15/2003US6593191 Buried channel strained silicon FET using a supply layer created through ion implantation
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